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armada-371x.dtsi
(370 B)
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armada-3720-db.dts
(4.35 KB)
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armada-3720-espressobin-emmc.dts
(973 B)
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armada-3720-espressobin-v7-emmc.dts
(1.16 KB)
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armada-3720-espressobin-v7.dts
(772 B)
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armada-3720-espressobin.dts
(511 B)
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armada-3720-espressobin.dtsi
(2.98 KB)
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armada-3720-turris-mox.dts
(14.09 KB)
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armada-3720-uDPU.dts
(3.59 KB)
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armada-372x.dtsi
(538 B)
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armada-37xx.dtsi
(11.97 KB)
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armada-7020.dtsi
(392 B)
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armada-7040-db.dts
(5.57 KB)
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armada-7040.dtsi
(735 B)
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armada-70x0.dtsi
(1.18 KB)
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armada-8020.dtsi
(689 B)
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armada-8040-clearfog-gt-8k.dts
(9.07 KB)
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armada-8040-db.dts
(5.98 KB)
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armada-8040-mcbin-singleshot.dts
(653 B)
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armada-8040-mcbin.dts
(876 B)
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armada-8040-mcbin.dtsi
(7.67 KB)
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armada-8040.dtsi
(1.13 KB)
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armada-8080-db.dts
(562 B)
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armada-8080.dtsi
(357 B)
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armada-80x0.dtsi
(2.27 KB)
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armada-ap806-dual.dtsi
(1.27 KB)
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armada-ap806-quad.dtsi
(2.05 KB)
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armada-ap806.dtsi
(557 B)
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armada-ap807-quad.dtsi
(2.05 KB)
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armada-ap807.dtsi
(529 B)
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armada-ap80x.dtsi
(10.32 KB)
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armada-ap810-ap0-octa-core.dtsi
(1.28 KB)
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armada-ap810-ap0.dtsi
(2.8 KB)
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armada-common.dtsi
(406 B)
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armada-cp110.dtsi
(229 B)
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armada-cp115.dtsi
(229 B)
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armada-cp11x.dtsi
(15.04 KB)
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cn9130-db.dts
(7.9 KB)
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cn9130.dtsi
(898 B)
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cn9131-db.dts
(4.15 KB)
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cn9132-db.dts
(4.61 KB)
Editing: armada-ap810-ap0.dtsi
// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (C) 2017 Marvell Technology Group Ltd. * * Device Tree file for Marvell Armada AP810. */ #include <dt-bindings/interrupt-controller/arm-gic.h> /dts-v1/; / { model = "Marvell Armada AP810"; compatible = "marvell,armada-ap810"; #address-cells = <2>; #size-cells = <2>; aliases { serial0 = &uart0_ap0; serial1 = &uart1_ap0; }; psci { compatible = "arm,psci-0.2"; method = "smc"; }; ap810-ap0 { #address-cells = <2>; #size-cells = <2>; compatible = "simple-bus"; interrupt-parent = <&gic>; ranges; config-space@e8000000 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x0 0x0 0xe8000000 0x4000000>; interrupt-parent = <&gic>; gic: interrupt-controller@3000000 { compatible = "arm,gic-v3"; #interrupt-cells = <3>; #address-cells = <1>; #size-cells = <1>; interrupt-controller; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; ranges; reg = <0x3000000 0x10000>, /* GICD */ <0x3060000 0x100000>, /* GICR */ <0x00c0000 0x2000>, /* GICC */ <0x00d0000 0x1000>, /* GICH */ <0x00e0000 0x2000>; /* GICV */ gic_its_ap0: interrupt-controller@3040000 { compatible = "arm,gic-v3-its"; msi-controller; #msi-cells = <1>; reg = <0x3040000 0x20000>; }; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; }; xor@400000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x400000 0x1000>, <0x410000 0x1000>; msi-parent = <&gic_its_ap0 0xa0>; dma-coherent; }; xor@420000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x420000 0x1000>, <0x430000 0x1000>; msi-parent = <&gic_its_ap0 0xa1>; dma-coherent; }; xor@440000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x440000 0x1000>, <0x450000 0x1000>; msi-parent = <&gic_its_ap0 0xa2>; dma-coherent; }; xor@460000 { compatible = "marvell,armada-7k-xor", "marvell,xor-v2"; reg = <0x460000 0x1000>, <0x470000 0x1000>; msi-parent = <&gic_its_ap0 0xa3>; dma-coherent; }; uart0_ap0: serial@512000 { compatible = "snps,dw-apb-uart"; reg = <0x512000 0x100>; reg-shift = <2>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; status = "disabled"; }; uart1_ap0: serial@512100 { compatible = "snps,dw-apb-uart"; reg = <0x512100 0x100>; reg-shift = <2>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; reg-io-width = <1>; status = "disabled"; }; }; }; };
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