003 File Manager
Current Path:
/usr/src/lib/libpmc/pmu-events/arch/x86/amdzen2
usr
/
src
/
lib
/
libpmc
/
pmu-events
/
arch
/
x86
/
amdzen2
/
📁
..
📄
branch.json
(1.64 KB)
📄
cache.json
(12.38 KB)
📄
core.json
(5.97 KB)
📄
floating-point.json
(7.8 KB)
📄
memory.json
(12.16 KB)
📄
other.json
(4.97 KB)
Editing: branch.json
[ { "EventName": "bp_l1_btb_correct", "EventCode": "0x8a", "BriefDescription": "L1 Branch Prediction Overrides Existing Prediction (speculative)." }, { "EventName": "bp_l2_btb_correct", "EventCode": "0x8b", "BriefDescription": "L2 Branch Prediction Overrides Existing Prediction (speculative)." }, { "EventName": "bp_dyn_ind_pred", "EventCode": "0x8e", "BriefDescription": "Dynamic Indirect Predictions.", "PublicDescription": "Indirect Branch Prediction for potential multi-target branch (speculative)." }, { "EventName": "bp_de_redirect", "EventCode": "0x91", "BriefDescription": "Decoder Overrides Existing Branch Prediction (speculative)." }, { "EventName": "bp_l1_tlb_fetch_hit", "EventCode": "0x94", "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB.", "UMask": "0xFF" }, { "EventName": "bp_l1_tlb_fetch_hit.if1g", "EventCode": "0x94", "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 1GB page.", "UMask": "0x4" }, { "EventName": "bp_l1_tlb_fetch_hit.if2m", "EventCode": "0x94", "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 2MB page.", "UMask": "0x2" }, { "EventName": "bp_l1_tlb_fetch_hit.if4k", "EventCode": "0x94", "BriefDescription": "The number of instruction fetches that hit in the L1 ITLB. Instruction fetches to a 4KB page.", "UMask": "0x1" }, { "EventName": "bp_tlb_rel", "EventCode": "0x99", "BriefDescription": "The number of ITLB reload requests." } ]
Upload File
Create Folder