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📁 ..
📄 allocator_config.h(2.57 KB)
📄 atomic_helpers.h(4.16 KB)
📄 bytemap.h(992 B)
📄 checksum.cpp(2.52 KB)
📄 checksum.h(1.67 KB)
📄 chunk.h(5.83 KB)
📄 combined.h(40.99 KB)
📄 common.cpp(874 B)
📄 common.h(5.29 KB)
📄 crc32_hw.cpp(656 B)
📄 flags.cpp(2.09 KB)
📄 flags.h(975 B)
📄 flags.inc(2.41 KB)
📄 flags_parser.cpp(4.38 KB)
📄 flags_parser.h(1.23 KB)
📄 fuchsia.cpp(6.04 KB)
📄 fuchsia.h(695 B)
📁 fuzz
📁 include
📄 internal_defs.h(4.61 KB)
📄 linux.cpp(6.1 KB)
📄 linux.h(2.77 KB)
📄 list.h(4.95 KB)
📄 local_cache.h(5.21 KB)
📄 memtag.h(7.21 KB)
📄 mutex.h(1.69 KB)
📄 platform.h(2.03 KB)
📄 primary32.h(18.05 KB)
📄 primary64.h(17.3 KB)
📄 quarantine.h(9.64 KB)
📄 release.cpp(522 B)
📄 release.h(10.27 KB)
📄 report.cpp(6.62 KB)
📄 report.h(1.97 KB)
📄 secondary.h(13.22 KB)
📄 size_class_map.h(9.9 KB)
📄 stack_depot.h(4.47 KB)
📄 stats.h(2.77 KB)
📄 string_utils.cpp(7.93 KB)
📄 string_utils.h(1.05 KB)
📄 tsd.h(1.84 KB)
📄 tsd_exclusive.h(4.03 KB)
📄 tsd_shared.h(5.53 KB)
📄 vector.h(3.07 KB)
📄 wrappers_c.cpp(1.19 KB)
📄 wrappers_c.h(1.46 KB)
📄 wrappers_c.inc(8.6 KB)
📄 wrappers_c_bionic.cpp(2.23 KB)
📄 wrappers_c_checks.h(1.99 KB)
📄 wrappers_cpp.cpp(4.53 KB)

Editing: checksum.cpp

//===-- checksum.cpp --------------------------------------------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#include "checksum.h"
#include "atomic_helpers.h"

#if defined(__x86_64__) || defined(__i386__)
#include <cpuid.h>
#elif defined(__arm__) || defined(__aarch64__)
#if SCUDO_FUCHSIA
#include <zircon/features.h>
#include <zircon/syscalls.h>
#else
#include <sys/auxv.h>
#endif
#endif

namespace scudo {

Checksum HashAlgorithm = {Checksum::BSD};

#if defined(__x86_64__) || defined(__i386__)
// i386 and x86_64 specific code to detect CRC32 hardware support via CPUID.
// CRC32 requires the SSE 4.2 instruction set.
#ifndef bit_SSE4_2
#define bit_SSE4_2 bit_SSE42 // clang and gcc have different defines.
#endif

#ifndef signature_HYGON_ebx // They are not defined in gcc.
// HYGON: "HygonGenuine".
#define signature_HYGON_ebx 0x6f677948
#define signature_HYGON_edx 0x6e65476e
#define signature_HYGON_ecx 0x656e6975
#endif

bool hasHardwareCRC32() {
  u32 Eax, Ebx = 0, Ecx = 0, Edx = 0;
  __get_cpuid(0, &Eax, &Ebx, &Ecx, &Edx);
  const bool IsIntel = (Ebx == signature_INTEL_ebx) &&
                       (Edx == signature_INTEL_edx) &&
                       (Ecx == signature_INTEL_ecx);
  const bool IsAMD = (Ebx == signature_AMD_ebx) && (Edx == signature_AMD_edx) &&
                     (Ecx == signature_AMD_ecx);
  const bool IsHygon = (Ebx == signature_HYGON_ebx) &&
                       (Edx == signature_HYGON_edx) &&
                       (Ecx == signature_HYGON_ecx);
  if (!IsIntel && !IsAMD && !IsHygon)
    return false;
  __get_cpuid(1, &Eax, &Ebx, &Ecx, &Edx);
  return !!(Ecx & bit_SSE4_2);
}
#elif defined(__arm__) || defined(__aarch64__)
#ifndef AT_HWCAP
#define AT_HWCAP 16
#endif
#ifndef HWCAP_CRC32
#define HWCAP_CRC32 (1U << 7) // HWCAP_CRC32 is missing on older platforms.
#endif

bool hasHardwareCRC32() {
#if SCUDO_FUCHSIA
  u32 HWCap;
  const zx_status_t Status =
      zx_system_get_features(ZX_FEATURE_KIND_CPU, &HWCap);
  if (Status != ZX_OK)
    return false;
  return !!(HWCap & ZX_ARM64_FEATURE_ISA_CRC32);
#else
  return !!(getauxval(AT_HWCAP) & HWCAP_CRC32);
#endif // SCUDO_FUCHSIA
}
#else
// No hardware CRC32 implemented in Scudo for other architectures.
bool hasHardwareCRC32() { return false; }
#endif // defined(__x86_64__) || defined(__i386__)

} // namespace scudo

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Editing: checksum.cpp

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