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autoconf.c
(2.78 KB)
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bus_machdep.c
(8.05 KB)
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bus_space_asm.S
(8.08 KB)
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busdma_bounce.c
(40.82 KB)
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busdma_machdep.c
(7.46 KB)
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bzero.S
(5.33 KB)
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clock.c
(1.47 KB)
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copyinout.S
(5.31 KB)
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cpu_errata.c
(5.14 KB)
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cpufunc_asm.S
(4.71 KB)
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db_disasm.c
(2.26 KB)
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db_interface.c
(5.33 KB)
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db_trace.c
(3.3 KB)
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debug_monitor.c
(14.85 KB)
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disassem.c
(15.34 KB)
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dump_machdep.c
(2.19 KB)
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efirt_machdep.c
(7.31 KB)
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elf32_machdep.c
(7.31 KB)
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elf_machdep.c
(7.58 KB)
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exception.S
(6.02 KB)
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freebsd32_machdep.c
(11.11 KB)
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gdb_machdep.c
(3.21 KB)
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genassym.c
(3.45 KB)
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gic_v3.c
(35.72 KB)
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gic_v3_acpi.c
(10.84 KB)
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gic_v3_fdt.c
(9.3 KB)
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gic_v3_reg.h
(13.57 KB)
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gic_v3_var.h
(3.96 KB)
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gicv3_its.c
(51.37 KB)
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identcpu.c
(51.79 KB)
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in_cksum.c
(6.24 KB)
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locore.S
(18.17 KB)
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machdep.c
(33.05 KB)
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machdep_boot.c
(6.13 KB)
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mem.c
(3.48 KB)
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memcpy.S
(6.71 KB)
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memmove.S
(5.25 KB)
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minidump_machdep.c
(10.08 KB)
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mp_machdep.c
(19.43 KB)
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nexus.c
(14.39 KB)
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ofw_machdep.c
(1.9 KB)
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pmap.c
(190.66 KB)
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stack_machdep.c
(2.61 KB)
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support.S
(6.38 KB)
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swtch.S
(7.23 KB)
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sys_machdep.c
(1.66 KB)
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trap.c
(14.88 KB)
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uio_machdep.c
(4.22 KB)
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uma_machdep.c
(2.3 KB)
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undefined.c
(4.63 KB)
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unwind.c
(1.92 KB)
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vfp.c
(9.92 KB)
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vm_machdep.c
(7.35 KB)
Editing: cpu_errata.c
/*- * SPDX-License-Identifier: BSD-2-Clause * * Copyright (c) 2018 Andrew Turner * All rights reserved. * * This software was developed by SRI International and the University of * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 * ("CTSRD"), as part of the DARPA CRASH research programme. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ #include "opt_platform.h" #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/kernel.h> #include <sys/pcpu.h> #include <sys/systm.h> #include <machine/cpu.h> #include <dev/psci/smccc.h> typedef void (cpu_quirk_install)(void); struct cpu_quirks { cpu_quirk_install *quirk_install; u_int midr_mask; u_int midr_value; }; static enum { SSBD_FORCE_ON, SSBD_FORCE_OFF, SSBD_KERNEL, } ssbd_method = SSBD_KERNEL; static cpu_quirk_install install_psci_bp_hardening; static cpu_quirk_install install_ssbd_workaround; static cpu_quirk_install install_thunderx_bcast_tlbi_workaround; static struct cpu_quirks cpu_quirks[] = { { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A57,0,0), .quirk_install = install_psci_bp_hardening, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A72,0,0), .quirk_install = install_psci_bp_hardening, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A73,0,0), .quirk_install = install_psci_bp_hardening, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A75,0,0), .quirk_install = install_psci_bp_hardening, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX2, 0,0), .quirk_install = install_psci_bp_hardening, }, { .midr_mask = 0, .midr_value = 0, .quirk_install = install_ssbd_workaround, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0), .quirk_install = install_thunderx_bcast_tlbi_workaround, }, { .midr_mask = CPU_IMPL_MASK | CPU_PART_MASK, .midr_value = CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX_81XX, 0, 0), .quirk_install = install_thunderx_bcast_tlbi_workaround, }, }; static void install_psci_bp_hardening(void) { if (smccc_arch_features(SMCCC_ARCH_WORKAROUND_1) != SMCCC_RET_SUCCESS) return; PCPU_SET(bp_harden, smccc_arch_workaround_1); } static void install_ssbd_workaround(void) { char *env; if (PCPU_GET(cpuid) == 0) { env = kern_getenv("kern.cfg.ssbd"); if (env != NULL) { if (strcmp(env, "force-on") == 0) { ssbd_method = SSBD_FORCE_ON; } else if (strcmp(env, "force-off") == 0) { ssbd_method = SSBD_FORCE_OFF; } } } /* Enable the workaround on this CPU if it's enabled in the firmware */ if (smccc_arch_features(SMCCC_ARCH_WORKAROUND_2) != SMCCC_RET_SUCCESS) return; switch(ssbd_method) { case SSBD_FORCE_ON: smccc_arch_workaround_2(1); break; case SSBD_FORCE_OFF: smccc_arch_workaround_2(0); break; case SSBD_KERNEL: default: PCPU_SET(ssbd, smccc_arch_workaround_2); break; } } /* * Workaround Cavium erratum 27456. * * Invalidate the local icache when changing address spaces. */ static void install_thunderx_bcast_tlbi_workaround(void) { u_int midr; midr = get_midr(); if (CPU_PART(midr) == CPU_PART_THUNDERX_81XX) PCPU_SET(bcast_tlbi_workaround, 1); else if (CPU_PART(midr) == CPU_PART_THUNDERX) { if (CPU_VAR(midr) == 0) { /* ThunderX 1.x */ PCPU_SET(bcast_tlbi_workaround, 1); } else if (CPU_VAR(midr) == 1 && CPU_REV(midr) <= 1) { /* ThunderX 2.0 - 2.1 */ PCPU_SET(bcast_tlbi_workaround, 1); } } } void install_cpu_errata(void) { u_int midr; size_t i; midr = get_midr(); for (i = 0; i < nitems(cpu_quirks); i++) { if ((midr & cpu_quirks[i].midr_mask) == cpu_quirks[i].midr_value) { cpu_quirks[i].quirk_install(); } } }
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