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📄 _inttypes.h(8.44 KB)
📄 _limits.h(4.08 KB)
📄 _stdint.h(5.97 KB)
📄 _types.h(4.82 KB)
📄 altivec.h(1.72 KB)
📄 asm.h(7.62 KB)
📄 atomic.h(27.49 KB)
📄 bat.h(6.28 KB)
📄 bus.h(18.04 KB)
📄 bus_dma.h(1.63 KB)
📄 clock.h(319 B)
📄 counter.h(3.92 KB)
📄 cpu.h(5.13 KB)
📄 cpufunc.h(5.41 KB)
📄 db_machdep.h(2.67 KB)
📄 dbdma.h(5.36 KB)
📄 dump.h(2.26 KB)
📄 efi.h(272 B)
📄 elf.h(4.46 KB)
📄 endian.h(4.86 KB)
📄 exec.h(1.69 KB)
📄 float.h(3.71 KB)
📄 floatingpoint.h(1.72 KB)
📄 fpu.h(2.97 KB)
📄 frame.h(3.79 KB)
📄 gdb_machdep.h(3.36 KB)
📄 hid.h(9.15 KB)
📄 ieee.h(4.34 KB)
📄 ieeefp.h(1.28 KB)
📄 ifunc.h(2.49 KB)
📄 in_cksum.h(2.86 KB)
📄 intr_machdep.h(2.37 KB)
📄 kdb.h(1.86 KB)
📄 limits.h(1.9 KB)
📄 machdep.h(1.61 KB)
📄 md_var.h(2.3 KB)
📄 memdev.h(1.6 KB)
📄 metadata.h(1.64 KB)
📄 minidump.h(1.84 KB)
📄 mmuvar.h(8.7 KB)
📄 ofw_machdep.h(2.28 KB)
📄 openpicreg.h(4.52 KB)
📄 openpicvar.h(2.96 KB)
📄 param.h(5.03 KB)
📄 pcb.h(4.06 KB)
📄 pcpu.h(5.53 KB)
📄 pcpu_aux.h(1.94 KB)
📄 pio.h(7.61 KB)
📄 platform.h(2.82 KB)
📄 platformvar.h(2.92 KB)
📄 pmap.h(11.4 KB)
📄 pmc_mdep.h(2.24 KB)
📄 proc.h(2.7 KB)
📄 procctl.h(62 B)
📄 profile.h(6.23 KB)
📄 psl.h(4.46 KB)
📄 pte.h(14.01 KB)
📄 ptrace.h(1.87 KB)
📄 reg.h(1.68 KB)
📄 reloc.h(1.6 KB)
📄 resource.h(1.91 KB)
📄 rtas.h(2.41 KB)
📄 runq.h(2.08 KB)
📄 sc_machdep.h(2.41 KB)
📄 setjmp.h(711 B)
📄 sigframe.h(1.69 KB)
📄 signal.h(2.2 KB)
📄 slb.h(3.4 KB)
📄 smp.h(2.07 KB)
📄 spr.h(45.73 KB)
📄 sr.h(2.37 KB)
📄 stack.h(1.16 KB)
📄 stdarg.h(1.58 KB)
📄 sysarch.h(1.8 KB)
📄 tlb.h(5.18 KB)
📄 trap.h(6.26 KB)
📄 ucontext.h(3.28 KB)
📄 vdso.h(1.62 KB)
📄 vm.h(1.78 KB)
📄 vmparam.h(9.21 KB)

Editing: cpufunc.h

/*-
 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
 *
 * Copyright (c) 1998 Doug Rabson
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#ifndef _MACHINE_CPUFUNC_H_
#define	_MACHINE_CPUFUNC_H_

#ifdef _KERNEL

#include <sys/types.h>

#include <machine/psl.h>
#include <machine/spr.h>

struct thread;

#ifdef KDB
void breakpoint(void);
#else
static __inline void
breakpoint(void)
{

return;
}
#endif

/* CPU register mangling inlines */

static __inline void
mtmsr(register_t value)
{

__asm __volatile ("mtmsr %0; isync" :: "r"(value));
}

#ifdef __powerpc64__
static __inline void
mtmsrd(register_t value)
{

__asm __volatile ("mtmsrd %0; isync" :: "r"(value));
}
#endif

static __inline register_t
mfmsr(void)
{
	register_t value;

__asm __volatile ("mfmsr %0" : "=r"(value));

return (value);
}

#ifndef __powerpc64__
static __inline void
mtsrin(vm_offset_t va, register_t value)
{

__asm __volatile ("mtsrin %0,%1; isync" :: "r"(value), "r"(va));
}

static __inline register_t
mfsrin(vm_offset_t va)
{
	register_t value;

__asm __volatile ("mfsrin %0,%1" : "=r"(value) : "r"(va));

return (value);
}
#endif

static __inline register_t
mfctrl(void)
{
	register_t value;

__asm __volatile ("mfspr %0,136" : "=r"(value));

return (value);
}

static __inline void
mtdec(register_t value)
{

__asm __volatile ("mtdec %0" :: "r"(value));
}

static __inline register_t
mfdec(void)
{
	register_t value;

__asm __volatile ("mfdec %0" : "=r"(value));

return (value);
}

static __inline register_t
mfpvr(void)
{
	register_t value;

__asm __volatile ("mfpvr %0" : "=r"(value));

return (value);
}

static __inline u_quad_t
mftb(void)
{
	u_quad_t tb;
      #ifdef __powerpc64__
	__asm __volatile ("mftb %0" : "=r"(tb));
      #else
	uint32_t *tbup = (uint32_t *)&tb;
	uint32_t *tblp = tbup + 1;

do {
		*tbup = mfspr(TBR_TBU);
		*tblp = mfspr(TBR_TBL);
	} while (*tbup != mfspr(TBR_TBU));
      #endif

return (tb);
}

static __inline void
mttb(u_quad_t time)
{

mtspr(TBR_TBWL, 0);
	mtspr(TBR_TBWU, (uint32_t)(time >> 32));
	mtspr(TBR_TBWL, (uint32_t)(time & 0xffffffff));
}

static __inline register_t
mffs(void)
{
	uint64_t value;

__asm __volatile ("mffs 0; stfd 0,0(%0)"
			:: "b"(&value));

return ((register_t)value);
}

static __inline void
mtfsf(uint64_t value)
{

__asm __volatile ("lfd 0,0(%0); mtfsf 0xff,0"
			:: "b"(&value));
}

static __inline void
eieio(void)
{

__asm __volatile ("eieio" : : : "memory");
}

static __inline void
isync(void)
{

__asm __volatile ("isync" : : : "memory");
}

static __inline void
powerpc_sync(void)
{

__asm __volatile ("sync" : : : "memory");
}

static __inline int
cntlzd(uint64_t word)
{
	uint64_t result;
	/* cntlzd %0, %1 */
	__asm __volatile(".long 0x7c000074 |  (%1 << 21) | (%0 << 16)" :
	    "=r"(result) : "r"(word));

return (int)result;
}

static __inline int
cnttzd(uint64_t word)
{
	uint64_t result;
	/* cnttzd %0, %1 */
	__asm __volatile(".long 0x7c000474 |  (%1 << 21) | (%0 << 16)" :
	    "=r"(result) : "r"(word));

return (int)result;
}

static __inline void
ptesync(void)
{
	__asm __volatile("ptesync");
}

static __inline register_t
intr_disable(void)
{
	register_t msr;

msr = mfmsr();
	mtmsr(msr & ~PSL_EE);
	return (msr);
}

static __inline void
intr_restore(register_t msr)
{

mtmsr(msr);
}

static __inline struct pcpu *
get_pcpu(void)
{
	struct pcpu *ret;

__asm __volatile("mfsprg %0, 0" : "=r"(ret));

return (ret);
}

#define	HAVE_INLINE_FLS
static __inline __pure2 int
fls(int mask)
{
	return (mask ? 32 - __builtin_clz(mask) : 0);
}

#define HAVE_INLINE_FLSL
static __inline __pure2 int
flsl(long mask)
{
	return (mask ? (8 * sizeof(long) - __builtin_clzl(mask)) : 0);
}

/* "NOP" operations to signify priorities to the kernel. */
static __inline void
nop_prio_vlow(void)
{
	__asm __volatile("or 31,31,31");
}

static __inline void
nop_prio_low(void)
{
	__asm __volatile("or 1,1,1");
}

static __inline void
nop_prio_mlow(void)
{
	__asm __volatile("or 6,6,6");
}

static __inline void
nop_prio_medium(void)
{
	__asm __volatile("or 2,2,2");
}

static __inline void
nop_prio_mhigh(void)
{
	__asm __volatile("or 5,5,5");
}

static __inline void
nop_prio_high(void)
{
	__asm __volatile("or 3,3,3");
}

#endif /* _KERNEL */

#endif /* !_MACHINE_CPUFUNC_H_ */

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Editing: cpufunc.h

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