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📁 ..
📄 cvmip.h(5.88 KB)
📄 cvmx-abi.h(3.67 KB)
📄 cvmx-access-native.h(26.79 KB)
📄 cvmx-access.h(7.82 KB)
📄 cvmx-address.h(10.26 KB)
📄 cvmx-agl-defs.h(213.66 KB)
📄 cvmx-app-hotplug.c(27.64 KB)
📄 cvmx-app-hotplug.h(5.77 KB)
📄 cvmx-app-init-linux.c(14.29 KB)
📄 cvmx-app-init.c(22.54 KB)
📄 cvmx-app-init.h(19.32 KB)
📄 cvmx-asm.h(39.3 KB)
📄 cvmx-asx0-defs.h(5.19 KB)
📄 cvmx-asxx-defs.h(50.57 KB)
📄 cvmx-atomic.h(21.71 KB)
📄 cvmx-bootloader.h(5.64 KB)
📄 cvmx-bootmem.c(40.91 KB)
📄 cvmx-bootmem.h(18.88 KB)
📄 cvmx-ciu-defs.h(702.5 KB)
📄 cvmx-ciu2-defs.h(487.31 KB)
📄 cvmx-clock.c(4.48 KB)
📄 cvmx-clock.h(4.43 KB)
📄 cvmx-cmd-queue.c(11.84 KB)
📄 cvmx-cmd-queue.h(22 KB)
📄 cvmx-cn3010-evb-hs5.c(6.05 KB)
📄 cvmx-cn3010-evb-hs5.h(2.3 KB)
📄 cvmx-compactflash.c(12.8 KB)
📄 cvmx-compactflash.h(3.05 KB)
📄 cvmx-core.c(5.3 KB)
📄 cvmx-core.h(9.46 KB)
📄 cvmx-coremask.c(4.12 KB)
📄 cvmx-coremask.h(8.11 KB)
📄 cvmx-crypto.c(2.6 KB)
📄 cvmx-crypto.h(2.54 KB)
📄 cvmx-csr-enums.h(8.45 KB)
📄 cvmx-csr-typedefs.h(3.92 KB)
📄 cvmx-csr.h(11.46 KB)
📄 cvmx-dbg-defs.h(6.28 KB)
📄 cvmx-debug-handler.S(7.44 KB)
📄 cvmx-debug-remote.c(3.24 KB)
📄 cvmx-debug-uart.c(7.88 KB)
📄 cvmx-debug.c(55.98 KB)
📄 cvmx-debug.h(22.2 KB)
📄 cvmx-dfa-defs.h(383.08 KB)
📄 cvmx-dfa.c(3.7 KB)
📄 cvmx-dfa.h(34.87 KB)
📄 cvmx-dfm-defs.h(205.93 KB)
📄 cvmx-dma-engine.c(20.25 KB)
📄 cvmx-dma-engine.h(24.06 KB)
📄 cvmx-dpi-defs.h(107.61 KB)
📄 cvmx-ebt3000.c(3.82 KB)
📄 cvmx-ebt3000.h(2.25 KB)
📄 cvmx-endor-defs.h(311.42 KB)
📄 cvmx-eoi-defs.h(26.27 KB)
📄 cvmx-fau.h(20.31 KB)
📄 cvmx-flash.c(22.46 KB)
📄 cvmx-flash.h(3.8 KB)
📄 cvmx-fpa-defs.h(157.78 KB)
📄 cvmx-fpa.c(6.63 KB)
📄 cvmx-fpa.h(10.39 KB)
📄 cvmx-gmx.h(3.07 KB)
📄 cvmx-gmxx-defs.h(505.27 KB)
📄 cvmx-gpio-defs.h(36.89 KB)
📄 cvmx-gpio.h(5.48 KB)
📄 cvmx-helper-board.c(58 KB)
📄 cvmx-helper-board.h(7.82 KB)
📄 cvmx-helper-cfg.c(18.68 KB)
📄 cvmx-helper-cfg.h(8.1 KB)
📄 cvmx-helper-check-defines.h(4.1 KB)
📄 cvmx-helper-errata.c(11.91 KB)
📄 cvmx-helper-errata.h(3.24 KB)
📄 cvmx-helper-fpa.c(8.81 KB)
📄 cvmx-helper-fpa.h(3.21 KB)
📄 cvmx-helper-ilk.c(12.74 KB)
📄 cvmx-helper-ilk.h(3.58 KB)
📄 cvmx-helper-jtag.c(7.05 KB)
📄 cvmx-helper-jtag.h(3.91 KB)
📄 cvmx-helper-loop.c(4.35 KB)
📄 cvmx-helper-loop.h(2.78 KB)
📄 cvmx-helper-npi.c(5.72 KB)
📄 cvmx-helper-npi.h(2.82 KB)
📄 cvmx-helper-rgmii.c(19.12 KB)
📄 cvmx-helper-rgmii.h(4.5 KB)
📄 cvmx-helper-sgmii.c(27.09 KB)
📄 cvmx-helper-sgmii.h(4.3 KB)
📄 cvmx-helper-spi.c(8.4 KB)
📄 cvmx-helper-spi.h(3.68 KB)
📄 cvmx-helper-srio.c(11.58 KB)
📄 cvmx-helper-srio.h(3.6 KB)
📄 cvmx-helper-util.c(25.77 KB)
📄 cvmx-helper-util.h(9.88 KB)
📄 cvmx-helper-xaui.c(16.54 KB)
📄 cvmx-helper-xaui.h(4.29 KB)
📄 cvmx-helper.c(69.71 KB)
📄 cvmx-helper.h(12.7 KB)
📄 cvmx-hfa.c(5.04 KB)
📄 cvmx-hfa.h(10.3 KB)
📄 cvmx-higig.h(23.21 KB)
📄 cvmx-ilk-defs.h(170.31 KB)
📄 cvmx-ilk.c(45.16 KB)
📄 cvmx-ilk.h(5.89 KB)
📄 cvmx-interrupt-handler.S(5.87 KB)
📄 cvmx-interrupt.c(47.42 KB)
📄 cvmx-interrupt.h(8.07 KB)
📄 cvmx-iob-defs.h(89.11 KB)
📄 cvmx-iob1-defs.h(6.8 KB)
📄 cvmx-ipd-defs.h(186.51 KB)
📄 cvmx-ipd.c(12.88 KB)
📄 cvmx-ipd.h(6.3 KB)
📄 cvmx-ixf18201.c(12.8 KB)
📄 cvmx-ixf18201.h(3.54 KB)
📄 cvmx-key-defs.h(11 KB)
📄 cvmx-key.h(3.29 KB)
📄 cvmx-l2c-defs.h(353.27 KB)
📄 cvmx-l2c.c(52.95 KB)
📄 cvmx-l2c.h(19.72 KB)
📄 cvmx-l2d-defs.h(60.71 KB)
📄 cvmx-l2t-defs.h(50.68 KB)
📄 cvmx-led-defs.h(22.68 KB)
📄 cvmx-llm.c(36.51 KB)
📄 cvmx-llm.h(11.72 KB)
📄 cvmx-lmcx-defs.h(532.21 KB)
📄 cvmx-log-arc.S(5.67 KB)
📄 cvmx-log.c(18.26 KB)
📄 cvmx-log.h(4.95 KB)
📁 cvmx-malloc
📄 cvmx-malloc.h(7.2 KB)
📄 cvmx-mdio.h(15.99 KB)
📄 cvmx-mgmt-port.c(36.2 KB)
📄 cvmx-mgmt-port.h(7.23 KB)
📄 cvmx-mio-defs.h(454.14 KB)
📄 cvmx-mixx-defs.h(94.59 KB)
📄 cvmx-mpi-defs.h(33.42 KB)
📄 cvmx-nand.c(76.64 KB)
📄 cvmx-nand.h(26.85 KB)
📄 cvmx-ndf-defs.h(25.53 KB)
📄 cvmx-npei-defs.h(378.19 KB)
📄 cvmx-npi-defs.h(252.36 KB)
📄 cvmx-npi.h(4.69 KB)
📄 cvmx-packet.h(2.94 KB)
📄 cvmx-pci-defs.h(250.53 KB)
📄 cvmx-pci.h(2.37 KB)
📄 cvmx-pcie.c(63 KB)
📄 cvmx-pcie.h(10.08 KB)
📄 cvmx-pcieepx-defs.h(304.49 KB)
📄 cvmx-pciercx-defs.h(284.89 KB)
📄 cvmx-pcm-defs.h(12.34 KB)
📄 cvmx-pcmx-defs.h(46.12 KB)
📄 cvmx-pcsx-defs.h(71.23 KB)
📄 cvmx-pcsxx-defs.h(45.79 KB)
📄 cvmx-pemx-defs.h(68.97 KB)
📄 cvmx-pescx-defs.h(49.92 KB)
📄 cvmx-pexp-defs.h(97.89 KB)
📄 cvmx-pip-defs.h(315.91 KB)
📄 cvmx-pip.h(33.65 KB)
📄 cvmx-pko-defs.h(181.41 KB)
📄 cvmx-pko.c(32 KB)
📄 cvmx-pko.h(31.29 KB)
📄 cvmx-platform.h(7.45 KB)
📄 cvmx-pow-defs.h(93.02 KB)
📄 cvmx-pow.c(32.26 KB)
📄 cvmx-pow.h(100.93 KB)
📄 cvmx-power-throttle.c(7.25 KB)
📄 cvmx-power-throttle.h(3.85 KB)
📄 cvmx-profiler.c(7.81 KB)
📄 cvmx-profiler.h(3.15 KB)
📄 cvmx-qlm-tables.c(35.37 KB)
📄 cvmx-qlm.c(23.41 KB)
📄 cvmx-qlm.h(4.76 KB)
📄 cvmx-rad-defs.h(43.58 KB)
📄 cvmx-raid.c(4.71 KB)
📄 cvmx-raid.h(13.02 KB)
📄 cvmx-resources.config(7.66 KB)
📄 cvmx-rng.h(5.02 KB)
📄 cvmx-rnm-defs.h(13.03 KB)
📄 cvmx-rtc.h(4.21 KB)
📄 cvmx-rwlock.h(5.25 KB)
📄 cvmx-scratch.h(4.76 KB)
📄 cvmx-shared-linux-n32.ld(11.8 KB)
📄 cvmx-shared-linux-o32.ld(10.67 KB)
📄 cvmx-shared-linux.ld(11.77 KB)
📄 cvmx-shmem.c(18.89 KB)
📄 cvmx-shmem.h(4.11 KB)
📄 cvmx-sim-magic.h(5.59 KB)
📄 cvmx-sli-defs.h(312.94 KB)
📄 cvmx-smi-defs.h(4.09 KB)
📄 cvmx-smix-defs.h(21.71 KB)
📄 cvmx-spi.c(24.99 KB)
📄 cvmx-spi.h(10.22 KB)
📄 cvmx-spi4000.c(19.23 KB)
📄 cvmx-spinlock.h(11.73 KB)
📄 cvmx-spx0-defs.h(3.94 KB)
📄 cvmx-spxx-defs.h(62.44 KB)
📄 cvmx-srio.c(63.05 KB)
📄 cvmx-srio.h(26.68 KB)
📄 cvmx-sriomaintx-defs.h(222.52 KB)
📄 cvmx-sriox-defs.h(211.56 KB)
📄 cvmx-srxx-defs.h(14.41 KB)
📄 cvmx-sso-defs.h(87.33 KB)
📄 cvmx-stxx-defs.h(34.02 KB)
📄 cvmx-swap.h(4.11 KB)
📄 cvmx-sysinfo.c(8.78 KB)
📄 cvmx-sysinfo.h(6.45 KB)
📄 cvmx-thunder.c(9.22 KB)
📄 cvmx-thunder.h(4.54 KB)
📄 cvmx-tim-defs.h(58.36 KB)
📄 cvmx-tim.c(10.92 KB)
📄 cvmx-tim.h(12.1 KB)
📄 cvmx-tlb.c(10.12 KB)
📄 cvmx-tlb.h(5.07 KB)
📄 cvmx-tra-defs.h(4.59 KB)
📄 cvmx-tra.c(31.16 KB)
📄 cvmx-tra.h(34.28 KB)
📄 cvmx-trax-defs.h(197.09 KB)
📄 cvmx-twsi.c(16.25 KB)
📄 cvmx-twsi.h(10.22 KB)
📄 cvmx-uahcx-defs.h(181.38 KB)
📄 cvmx-uart.c(5.69 KB)
📄 cvmx-uart.h(4.58 KB)
📄 cvmx-uctlx-defs.h(50.26 KB)
📄 cvmx-usb.c(138.53 KB)
📄 cvmx-usb.h(46.67 KB)
📄 cvmx-usbcx-defs.h(259.23 KB)
📄 cvmx-usbd.c(36.09 KB)
📄 cvmx-usbd.h(9.82 KB)
📄 cvmx-usbnx-defs.h(136.12 KB)
📄 cvmx-utils.h(7.54 KB)
📄 cvmx-version.h(2.23 KB)
📄 cvmx-warn.c(2.75 KB)
📄 cvmx-warn.h(2.43 KB)
📄 cvmx-wqe.h(38.61 KB)
📄 cvmx-zip-defs.h(43.18 KB)
📄 cvmx-zip.c(7.37 KB)
📄 cvmx-zip.h(8.5 KB)
📄 cvmx-zone.c(4.7 KB)
📄 cvmx.h(3.5 KB)
📄 octeon-boot-info.h(8.08 KB)
📄 octeon-feature.c(4.71 KB)
📄 octeon-feature.h(11.94 KB)
📄 octeon-model.c(15.79 KB)
📄 octeon-model.h(16.53 KB)
📄 octeon-pci-console.c(19.73 KB)
📄 octeon-pci-console.h(5.18 KB)

Editing: cvmx-flash.c

/***********************license start***************
 * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
 * reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *
 *   * Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *
 *   * Redistributions in binary form must reproduce the above
 *     copyright notice, this list of conditions and the following
 *     disclaimer in the documentation and/or other materials provided
 *     with the distribution.

*   * Neither the name of Cavium Inc. nor the names of
 *     its contributors may be used to endorse or promote products
 *     derived from this software without specific prior written
 *     permission.

* This Software, including technical data, may be subject to U.S. export  control
 * laws, including the U.S. Export Administration Act and its  associated
 * regulations, and may be subject to export or import  regulations in other
 * countries.

* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
 ***********************license end**************************************/

/**
 * @file
 *
 * This file provides bootbus flash operations
 *
 * <hr>$Revision: 70030 $<hr>
 *
 *
 */

#include "cvmx-config.h"
#include "cvmx.h"
#include "cvmx-sysinfo.h"
#include "cvmx-spinlock.h"
#include "cvmx-flash.h"

#define MAX_NUM_FLASH_CHIPS 8   /* Maximum number of flash chips */
#define MAX_NUM_REGIONS     8   /* Maximum number of block regions per chip */
#define DEBUG 1

#define CFI_CMDSET_NONE             0
#define CFI_CMDSET_INTEL_EXTENDED   1
#define CFI_CMDSET_AMD_STANDARD     2
#define CFI_CMDSET_INTEL_STANDARD   3
#define CFI_CMDSET_AMD_EXTENDED     4
#define CFI_CMDSET_MITSU_STANDARD   256
#define CFI_CMDSET_MITSU_EXTENDED   257
#define CFI_CMDSET_SST              258

typedef struct
{
    void *              base_ptr;       /**< Memory pointer to start of flash */
    int                 is_16bit;       /**< Chip is 16bits wide in 8bit mode */
    uint16_t            vendor;         /**< Vendor ID of Chip */
    int                 size;           /**< Size of the chip in bytes */
    uint64_t            erase_timeout;  /**< Erase timeout in cycles */
    uint64_t            write_timeout;  /**< Write timeout in cycles */
    int                 num_regions;    /**< Number of block regions */
    cvmx_flash_region_t region[MAX_NUM_REGIONS];
} cvmx_flash_t;

static CVMX_SHARED cvmx_flash_t flash_info[MAX_NUM_FLASH_CHIPS];
static CVMX_SHARED cvmx_spinlock_t flash_lock = CVMX_SPINLOCK_UNLOCKED_INITIALIZER;

/**
 * @INTERNAL
 * Read a byte from flash
 *
 * @param chip_id Chip to read from
 * @param offset  Offset into the chip
 * @return Value read
 */
static uint8_t __cvmx_flash_read8(int chip_id, int offset)
{
    return *(volatile uint8_t *)(flash_info[chip_id].base_ptr + offset);
}

/**
 * @INTERNAL
 * Read a byte from flash (for commands)
 *
 * @param chip_id Chip to read from
 * @param offset  Offset into the chip
 * @return Value read
 */
static uint8_t __cvmx_flash_read_cmd(int chip_id, int offset)
{
    if (flash_info[chip_id].is_16bit)
        offset<<=1;
    return __cvmx_flash_read8(chip_id, offset);
}

/**
 * @INTERNAL
 * Read 16bits from flash (for commands)
 *
 * @param chip_id Chip to read from
 * @param offset  Offset into the chip
 * @return Value read
 */
static uint16_t __cvmx_flash_read_cmd16(int chip_id, int offset)
{
    uint16_t v = __cvmx_flash_read_cmd(chip_id, offset);
    v |= __cvmx_flash_read_cmd(chip_id, offset + 1)<<8;
    return v;
}

/**
 * @INTERNAL
 * Write a byte to flash
 *
 * @param chip_id Chip to write to
 * @param offset  Offset into the chip
 * @param data    Value to write
 */
static void __cvmx_flash_write8(int chip_id, int offset, uint8_t data)
{
    volatile uint8_t *flash_ptr = (volatile uint8_t *)flash_info[chip_id].base_ptr;
    flash_ptr[offset] = data;
}

/**
 * @INTERNAL
 * Write a byte to flash (for commands)
 *
 * @param chip_id Chip to write to
 * @param offset  Offset into the chip
 * @param data    Value to write
 */
static void __cvmx_flash_write_cmd(int chip_id, int offset, uint8_t data)
{
    volatile uint8_t *flash_ptr = (volatile uint8_t *)flash_info[chip_id].base_ptr;
    flash_ptr[offset<<flash_info[chip_id].is_16bit] = data;
}

/**
 * @INTERNAL
 * Query a address and see if a CFI flash chip is there.
 *
 * @param chip_id  Chip ID data to fill in if the chip is there
 * @param base_ptr Memory pointer to the start address to query
 * @return Zero on success, Negative on failure
 */
static int __cvmx_flash_queury_cfi(int chip_id, void *base_ptr)
{
    int region;
    cvmx_flash_t *flash = flash_info + chip_id;

/* Set the minimum needed for the read and write primitives to work */
    flash->base_ptr = base_ptr;
    flash->is_16bit = 1;   /* FIXME: Currently assumes the chip is 16bits */

/* Put flash in CFI query mode */
    __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
    __cvmx_flash_write_cmd(chip_id, 0x55, 0x98);

/* Make sure we get the QRY response we should */
    if ((__cvmx_flash_read_cmd(chip_id, 0x10) != 'Q') ||
        (__cvmx_flash_read_cmd(chip_id, 0x11) != 'R') ||
        (__cvmx_flash_read_cmd(chip_id, 0x12) != 'Y'))
    {
        flash->base_ptr = NULL;
        return -1;
    }

/* Read the 16bit vendor ID */
    flash->vendor = __cvmx_flash_read_cmd16(chip_id, 0x13);

/* Read the write timeout. The timeout is microseconds(us) is 2^0x1f
        typically. The worst case is this value time 2^0x23 */
    flash->write_timeout = 1ull << (__cvmx_flash_read_cmd(chip_id, 0x1f) +
                                    __cvmx_flash_read_cmd(chip_id, 0x23));

/* Read the erase timeout. The timeout is milliseconds(ms) is 2^0x21
        typically. The worst case is this value time 2^0x25 */
    flash->erase_timeout = 1ull << (__cvmx_flash_read_cmd(chip_id, 0x21) +
                                    __cvmx_flash_read_cmd(chip_id, 0x25));

/* Get the flash size. This is 2^0x27 */
    flash->size = 1<<__cvmx_flash_read_cmd(chip_id, 0x27);

/* Get the number of different sized block regions from 0x2c */
    flash->num_regions = __cvmx_flash_read_cmd(chip_id, 0x2c);

int start_offset = 0;
    /* Loop through all regions get information about each */
    for (region=0; region<flash->num_regions; region++)
    {
        cvmx_flash_region_t *rgn_ptr = flash->region + region;
        rgn_ptr->start_offset = start_offset;

/* The number of blocks in each region is a 16 bit little endian
            endian field. It is encoded at 0x2d + region*4 as (blocks-1) */
        uint16_t blocks = __cvmx_flash_read_cmd16(chip_id, 0x2d + region*4);
        rgn_ptr->num_blocks =  1u + blocks;

/* The size of each block is a 16 bit little endian endian field. It
            is encoded at 0x2d + region*4 + 2 as (size/256). Zero is a special
            case representing 128 */
        uint16_t size = __cvmx_flash_read_cmd16(chip_id, 0x2d + region*4 + 2);
        if (size == 0)
            rgn_ptr->block_size = 128;
        else
            rgn_ptr->block_size = 256u * size;

start_offset += rgn_ptr->block_size * rgn_ptr->num_blocks;
    }

/* Take the chip out of CFI query mode */
    switch (flash_info[chip_id].vendor)
    {
        case CFI_CMDSET_AMD_STANDARD:
            __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0);
        case CFI_CMDSET_INTEL_STANDARD:
        case CFI_CMDSET_INTEL_EXTENDED:
            __cvmx_flash_write_cmd(chip_id, 0x00, 0xff);
            break;
    }

/* Convert the timeouts to cycles */
    flash->write_timeout *= cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000000;
    flash->erase_timeout *= cvmx_clock_get_rate(CVMX_CLOCK_CORE) / 1000;

#if DEBUG
    /* Print the information about the chip */
    cvmx_dprintf("cvmx-flash: Base pointer:  %p\n"
           "            Vendor:        0x%04x\n"
           "            Size:          %d bytes\n"
           "            Num regions:   %d\n"
           "            Erase timeout: %llu cycles\n"
           "            Write timeout: %llu cycles\n",
           flash->base_ptr,
           (unsigned int)flash->vendor,
           flash->size,
           flash->num_regions,
           (unsigned long long)flash->erase_timeout,
           (unsigned long long)flash->write_timeout);

for (region=0; region<flash->num_regions; region++)
    {
        cvmx_dprintf("            Region %d: offset 0x%x, %d blocks, %d bytes/block\n",
               region,
               flash->region[region].start_offset,
               flash->region[region].num_blocks,
               flash->region[region].block_size);
    }
#endif

return 0;
}

/**
 * Initialize the flash access library
 */
void cvmx_flash_initialize(void)
{
    int boot_region;
    int chip_id = 0;

memset(flash_info, 0, sizeof(flash_info));

/* Loop through each boot bus chip select region */
    for (boot_region=0; boot_region<MAX_NUM_FLASH_CHIPS; boot_region++)
    {
        cvmx_mio_boot_reg_cfgx_t region_cfg;
        region_cfg.u64 = cvmx_read_csr(CVMX_MIO_BOOT_REG_CFG0 + boot_region*8);
        /* Only try chip select regions that are enabled. This assumes the
            bootloader already setup the flash */
        if (region_cfg.s.en)
        {
            /* Convert the hardware address to a pointer. Note that the bootbus,
                unlike memory, isn't 1:1 mapped in the simple exec */
            void *base_ptr = cvmx_phys_to_ptr((region_cfg.s.base<<16) | 0xffffffff80000000ull);
            if (__cvmx_flash_queury_cfi(chip_id, base_ptr) == 0)
            {
                /* Valid CFI flash chip found */
                chip_id++;
            }
        }
    }

if (chip_id == 0)
        cvmx_dprintf("cvmx-flash: No CFI chips found\n");
}

/**
 * Return a pointer to the flash chip
 *
 * @param chip_id Chip ID to return
 * @return NULL if the chip doesn't exist
 */
void *cvmx_flash_get_base(int chip_id)
{
    return flash_info[chip_id].base_ptr;
}

/**
 * Return the number of erasable regions on the chip
 *
 * @param chip_id Chip to return info for
 * @return Number of regions
 */
int cvmx_flash_get_num_regions(int chip_id)
{
    return flash_info[chip_id].num_regions;
}

/**
 * Return information about a flash chips region
 *
 * @param chip_id Chip to get info for
 * @param region  Region to get info for
 * @return Region information
 */
const cvmx_flash_region_t *cvmx_flash_get_region_info(int chip_id, int region)
{
    return flash_info[chip_id].region + region;
}

/**
 * Erase a block on the flash chip
 *
 * @param chip_id Chip to erase a block on
 * @param region  Region to erase a block in
 * @param block   Block number to erase
 * @return Zero on success. Negative on failure
 */
int cvmx_flash_erase_block(int chip_id, int region, int block)
{
    cvmx_spinlock_lock(&flash_lock);
#if DEBUG
    cvmx_dprintf("cvmx-flash: Erasing chip %d, region %d, block %d\n",
           chip_id, region, block);
#endif

int offset = flash_info[chip_id].region[region].start_offset +
                block * flash_info[chip_id].region[region].block_size;

switch (flash_info[chip_id].vendor)
    {
        case CFI_CMDSET_AMD_STANDARD:
        {
            /* Send the erase sector command sequence */
            __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
            __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
            __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
            __cvmx_flash_write_cmd(chip_id, 0x555, 0x80);
            __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
            __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
            __cvmx_flash_write8(chip_id, offset, 0x30);

/* Loop checking status */
            uint8_t status = __cvmx_flash_read8(chip_id, offset);
            uint64_t start_cycle = cvmx_get_cycle();
            while (1)
            {
                /* Read the status and xor it with the old status so we can
                    find toggling bits */
                uint8_t old_status = status;
                status = __cvmx_flash_read8(chip_id, offset);
                uint8_t toggle = status ^ old_status;

/* Check if the erase in progress bit is toggling */
                if (toggle & (1<<6))
                {
                    /* Check hardware timeout */
                    if (status & (1<<5))
                    {
                        /* Chip has signalled a timeout. Reread the status */
                        old_status = __cvmx_flash_read8(chip_id, offset);
                        status = __cvmx_flash_read8(chip_id, offset);
                        toggle = status ^ old_status;

/* Check if the erase in progress bit is toggling */
                        if (toggle & (1<<6))
                        {
                            cvmx_dprintf("cvmx-flash: Hardware timeout erasing block\n");
                            cvmx_spinlock_unlock(&flash_lock);
                            return -1;
                        }
                        else
                            break;  /* Not toggling, erase complete */
                    }
                }
                else
                    break;  /* Not toggling, erase complete */

if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].erase_timeout)
                {
                    cvmx_dprintf("cvmx-flash: Timeout erasing block\n");
                    cvmx_spinlock_unlock(&flash_lock);
                    return -1;
                }
            }

__cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
            cvmx_spinlock_unlock(&flash_lock);
            return 0;
        }
        case CFI_CMDSET_INTEL_STANDARD:
        case CFI_CMDSET_INTEL_EXTENDED:
        {
            /* Send the erase sector command sequence */
            __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
            __cvmx_flash_write8(chip_id, offset, 0x20);
            __cvmx_flash_write8(chip_id, offset, 0xd0);

/* Loop checking status */
            uint8_t status = __cvmx_flash_read8(chip_id, offset);
            uint64_t start_cycle = cvmx_get_cycle();
            while ((status & 0x80) == 0)
            {
                if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].erase_timeout)
                {
                    cvmx_dprintf("cvmx-flash: Timeout erasing block\n");
                    cvmx_spinlock_unlock(&flash_lock);
                    return -1;
                }
                status = __cvmx_flash_read8(chip_id, offset);
            }

/* Check the final status */
            if (status & 0x7f)
            {
                cvmx_dprintf("cvmx-flash: Hardware failure erasing block\n");
                cvmx_spinlock_unlock(&flash_lock);
                return -1;
            }

__cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
            cvmx_spinlock_unlock(&flash_lock);
            return 0;
        }
    }

cvmx_dprintf("cvmx-flash: Unsupported flash vendor\n");
    cvmx_spinlock_unlock(&flash_lock);
    return -1;
}

/**
 * Write a block on the flash chip
 *
 * @param chip_id Chip to write a block on
 * @param region  Region to write a block in
 * @param block   Block number to write
 * @param data    Data to write
 * @return Zero on success. Negative on failure
 */
int cvmx_flash_write_block(int chip_id, int region, int block, const void *data)
{
    cvmx_spinlock_lock(&flash_lock);
#if DEBUG
    cvmx_dprintf("cvmx-flash: Writing chip %d, region %d, block %d\n",
           chip_id, region, block);
#endif
    int offset = flash_info[chip_id].region[region].start_offset +
                block * flash_info[chip_id].region[region].block_size;
    int len = flash_info[chip_id].region[region].block_size;
    const uint8_t *ptr = (const uint8_t *)data;

switch (flash_info[chip_id].vendor)
    {
        case CFI_CMDSET_AMD_STANDARD:
        {
            /* Loop through one byte at a time */
            while (len--)
            {
                /* Send the program sequence */
                __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
                __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
                __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
                __cvmx_flash_write_cmd(chip_id, 0x555, 0xa0);
                __cvmx_flash_write8(chip_id, offset, *ptr);

/* Loop polling for status */
                uint64_t start_cycle = cvmx_get_cycle();
                while (1)
                {
                    uint8_t status = __cvmx_flash_read8(chip_id, offset);
                    if (((status ^ *ptr) & (1<<7)) == 0)
                        break;  /* Data matches, this byte is done */
                    else if (status & (1<<5))
                    {
                        /* Hardware timeout, recheck status */
                        status = __cvmx_flash_read8(chip_id, offset);
                        if (((status ^ *ptr) & (1<<7)) == 0)
                            break;  /* Data matches, this byte is done */
                        else
                        {
                            cvmx_dprintf("cvmx-flash: Hardware write timeout\n");
                            cvmx_spinlock_unlock(&flash_lock);
                            return -1;
                        }
                    }

if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].write_timeout)
                    {
                        cvmx_dprintf("cvmx-flash: Timeout writing block\n");
                        cvmx_spinlock_unlock(&flash_lock);
                        return -1;
                    }
                }

/* Increment to the next byte */
                ptr++;
                offset++;
            }

__cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
            cvmx_spinlock_unlock(&flash_lock);
            return 0;
        }
        case CFI_CMDSET_INTEL_STANDARD:
        case CFI_CMDSET_INTEL_EXTENDED:
        {
cvmx_dprintf("%s:%d len=%d\n", __FUNCTION__, __LINE__, len);
            /* Loop through one byte at a time */
            while (len--)
            {
                /* Send the program sequence */
                __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
                __cvmx_flash_write8(chip_id, offset, 0x40);
                __cvmx_flash_write8(chip_id, offset, *ptr);

/* Loop polling for status */
                uint8_t status = __cvmx_flash_read8(chip_id, offset);
                uint64_t start_cycle = cvmx_get_cycle();
                while ((status & 0x80) == 0)
                {
                    if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].write_timeout)
                    {
                        cvmx_dprintf("cvmx-flash: Timeout writing block\n");
                        cvmx_spinlock_unlock(&flash_lock);
                        return -1;
                    }
                    status = __cvmx_flash_read8(chip_id, offset);
                }

/* Check the final status */
                if (status & 0x7f)
                {
                    cvmx_dprintf("cvmx-flash: Hardware failure erasing block\n");
                    cvmx_spinlock_unlock(&flash_lock);
                    return -1;
                }

/* Increment to the next byte */
                ptr++;
                offset++;
            }
cvmx_dprintf("%s:%d\n", __FUNCTION__, __LINE__);

__cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
            cvmx_spinlock_unlock(&flash_lock);
            return 0;
        }
    }

cvmx_dprintf("cvmx-flash: Unsupported flash vendor\n");
    cvmx_spinlock_unlock(&flash_lock);
    return -1;
}

/**
 * Erase and write data to a flash
 *
 * @param address Memory address to write to
 * @param data    Data to write
 * @param len     Length of the data
 * @return Zero on success. Negative on failure
 */
int cvmx_flash_write(void *address, const void *data, int len)
{
    int chip_id;

/* Find which chip controls this address. Don't allow the write to span
        multiple chips */
    for (chip_id=0; chip_id<MAX_NUM_FLASH_CHIPS; chip_id++)
    {
        if ((flash_info[chip_id].base_ptr <= address) &&
            (flash_info[chip_id].base_ptr + flash_info[chip_id].size >= address + len))
            break;
    }

if (chip_id == MAX_NUM_FLASH_CHIPS)
    {
        cvmx_dprintf("cvmx-flash: Unable to find chip that contains address %p\n", address);
        return -1;
    }

cvmx_flash_t *flash = flash_info + chip_id;

/* Determine which block region we need to start writing to */
    void *region_base = flash->base_ptr;
    int region = 0;
    while (region_base + flash->region[region].num_blocks * flash->region[region].block_size <= address)
    {
        region++;
        region_base = flash->base_ptr + flash->region[region].start_offset;
    }

/* Determine which block in the region to start at */
    int block = (address - region_base) / flash->region[region].block_size;

/* Require all writes to start on block boundries */
    if (address != region_base + block*flash->region[region].block_size)
    {
        cvmx_dprintf("cvmx-flash: Write address not aligned on a block boundry\n");
        return -1;
    }

/* Loop until we're out of data */
    while (len > 0)
    {
        /* Erase the current block */
        if (cvmx_flash_erase_block(chip_id, region, block))
            return -1;
        /* Write the new data */
        if (cvmx_flash_write_block(chip_id, region, block, data))
            return -1;

/* Increment to the next block */
        data += flash->region[region].block_size;
        len -= flash->region[region].block_size;
        block++;
        if (block >= flash->region[region].num_blocks)
        {
            block = 0;
            region++;
        }
    }

return 0;
}

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