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cvmip.h
(5.88 KB)
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cvmx-abi.h
(3.67 KB)
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cvmx-access-native.h
(26.79 KB)
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cvmx-access.h
(7.82 KB)
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cvmx-address.h
(10.26 KB)
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cvmx-agl-defs.h
(213.66 KB)
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cvmx-app-hotplug.c
(27.64 KB)
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cvmx-app-hotplug.h
(5.77 KB)
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cvmx-app-init-linux.c
(14.29 KB)
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cvmx-app-init.c
(22.54 KB)
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cvmx-app-init.h
(19.32 KB)
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cvmx-asm.h
(39.3 KB)
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cvmx-asx0-defs.h
(5.19 KB)
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cvmx-asxx-defs.h
(50.57 KB)
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cvmx-atomic.h
(21.71 KB)
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cvmx-bootloader.h
(5.64 KB)
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cvmx-bootmem.c
(40.91 KB)
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cvmx-bootmem.h
(18.88 KB)
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cvmx-ciu-defs.h
(702.5 KB)
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cvmx-ciu2-defs.h
(487.31 KB)
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cvmx-clock.c
(4.48 KB)
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cvmx-clock.h
(4.43 KB)
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cvmx-cmd-queue.c
(11.84 KB)
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cvmx-cmd-queue.h
(22 KB)
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cvmx-cn3010-evb-hs5.c
(6.05 KB)
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cvmx-cn3010-evb-hs5.h
(2.3 KB)
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cvmx-compactflash.c
(12.8 KB)
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cvmx-compactflash.h
(3.05 KB)
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cvmx-core.c
(5.3 KB)
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cvmx-core.h
(9.46 KB)
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cvmx-coremask.c
(4.12 KB)
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cvmx-coremask.h
(8.11 KB)
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cvmx-crypto.c
(2.6 KB)
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cvmx-crypto.h
(2.54 KB)
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cvmx-csr-enums.h
(8.45 KB)
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cvmx-csr-typedefs.h
(3.92 KB)
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cvmx-csr.h
(11.46 KB)
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cvmx-dbg-defs.h
(6.28 KB)
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cvmx-debug-handler.S
(7.44 KB)
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cvmx-debug-remote.c
(3.24 KB)
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cvmx-debug-uart.c
(7.88 KB)
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cvmx-debug.c
(55.98 KB)
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cvmx-debug.h
(22.2 KB)
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cvmx-dfa-defs.h
(383.08 KB)
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cvmx-dfa.c
(3.7 KB)
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cvmx-dfa.h
(34.87 KB)
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cvmx-dfm-defs.h
(205.93 KB)
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cvmx-dma-engine.c
(20.25 KB)
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cvmx-dma-engine.h
(24.06 KB)
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cvmx-dpi-defs.h
(107.61 KB)
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cvmx-ebt3000.c
(3.82 KB)
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cvmx-ebt3000.h
(2.25 KB)
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cvmx-endor-defs.h
(311.42 KB)
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cvmx-eoi-defs.h
(26.27 KB)
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cvmx-fau.h
(20.31 KB)
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cvmx-flash.c
(22.46 KB)
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cvmx-flash.h
(3.8 KB)
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cvmx-fpa-defs.h
(157.78 KB)
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cvmx-fpa.c
(6.63 KB)
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cvmx-fpa.h
(10.39 KB)
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cvmx-gmx.h
(3.07 KB)
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cvmx-gmxx-defs.h
(505.27 KB)
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cvmx-gpio-defs.h
(36.89 KB)
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cvmx-gpio.h
(5.48 KB)
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cvmx-helper-board.c
(58 KB)
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cvmx-helper-board.h
(7.82 KB)
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cvmx-helper-cfg.c
(18.68 KB)
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cvmx-helper-cfg.h
(8.1 KB)
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cvmx-helper-check-defines.h
(4.1 KB)
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cvmx-helper-errata.c
(11.91 KB)
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cvmx-helper-errata.h
(3.24 KB)
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cvmx-helper-fpa.c
(8.81 KB)
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cvmx-helper-fpa.h
(3.21 KB)
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cvmx-helper-ilk.c
(12.74 KB)
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cvmx-helper-ilk.h
(3.58 KB)
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cvmx-helper-jtag.c
(7.05 KB)
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cvmx-helper-jtag.h
(3.91 KB)
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cvmx-helper-loop.c
(4.35 KB)
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cvmx-helper-loop.h
(2.78 KB)
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cvmx-helper-npi.c
(5.72 KB)
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cvmx-helper-npi.h
(2.82 KB)
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cvmx-helper-rgmii.c
(19.12 KB)
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cvmx-helper-rgmii.h
(4.5 KB)
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cvmx-helper-sgmii.c
(27.09 KB)
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cvmx-helper-sgmii.h
(4.3 KB)
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cvmx-helper-spi.c
(8.4 KB)
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cvmx-helper-spi.h
(3.68 KB)
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cvmx-helper-srio.c
(11.58 KB)
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cvmx-helper-srio.h
(3.6 KB)
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cvmx-helper-util.c
(25.77 KB)
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cvmx-helper-util.h
(9.88 KB)
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cvmx-helper-xaui.c
(16.54 KB)
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cvmx-helper-xaui.h
(4.29 KB)
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cvmx-helper.c
(69.71 KB)
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cvmx-helper.h
(12.7 KB)
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cvmx-hfa.c
(5.04 KB)
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cvmx-hfa.h
(10.3 KB)
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cvmx-higig.h
(23.21 KB)
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cvmx-ilk-defs.h
(170.31 KB)
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cvmx-ilk.c
(45.16 KB)
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cvmx-ilk.h
(5.89 KB)
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cvmx-interrupt-handler.S
(5.87 KB)
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cvmx-interrupt.c
(47.42 KB)
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cvmx-interrupt.h
(8.07 KB)
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cvmx-iob-defs.h
(89.11 KB)
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cvmx-iob1-defs.h
(6.8 KB)
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cvmx-ipd-defs.h
(186.51 KB)
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cvmx-ipd.c
(12.88 KB)
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cvmx-ipd.h
(6.3 KB)
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cvmx-ixf18201.c
(12.8 KB)
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cvmx-ixf18201.h
(3.54 KB)
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cvmx-key-defs.h
(11 KB)
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cvmx-key.h
(3.29 KB)
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cvmx-l2c-defs.h
(353.27 KB)
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cvmx-l2c.c
(52.95 KB)
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cvmx-l2c.h
(19.72 KB)
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cvmx-l2d-defs.h
(60.71 KB)
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cvmx-l2t-defs.h
(50.68 KB)
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cvmx-led-defs.h
(22.68 KB)
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cvmx-llm.c
(36.51 KB)
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cvmx-llm.h
(11.72 KB)
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cvmx-lmcx-defs.h
(532.21 KB)
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cvmx-log-arc.S
(5.67 KB)
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cvmx-log.c
(18.26 KB)
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cvmx-log.h
(4.95 KB)
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cvmx-malloc
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cvmx-malloc.h
(7.2 KB)
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cvmx-mdio.h
(15.99 KB)
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cvmx-mgmt-port.c
(36.2 KB)
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cvmx-mgmt-port.h
(7.23 KB)
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cvmx-mio-defs.h
(454.14 KB)
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cvmx-mixx-defs.h
(94.59 KB)
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cvmx-mpi-defs.h
(33.42 KB)
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cvmx-nand.c
(76.64 KB)
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cvmx-nand.h
(26.85 KB)
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cvmx-ndf-defs.h
(25.53 KB)
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cvmx-npei-defs.h
(378.19 KB)
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cvmx-npi-defs.h
(252.36 KB)
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cvmx-npi.h
(4.69 KB)
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cvmx-packet.h
(2.94 KB)
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cvmx-pci-defs.h
(250.53 KB)
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cvmx-pci.h
(2.37 KB)
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cvmx-pcie.c
(63 KB)
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cvmx-pcie.h
(10.08 KB)
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cvmx-pcieepx-defs.h
(304.49 KB)
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cvmx-pciercx-defs.h
(284.89 KB)
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cvmx-pcm-defs.h
(12.34 KB)
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cvmx-pcmx-defs.h
(46.12 KB)
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cvmx-pcsx-defs.h
(71.23 KB)
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cvmx-pcsxx-defs.h
(45.79 KB)
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cvmx-pemx-defs.h
(68.97 KB)
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cvmx-pescx-defs.h
(49.92 KB)
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cvmx-pexp-defs.h
(97.89 KB)
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cvmx-pip-defs.h
(315.91 KB)
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cvmx-pip.h
(33.65 KB)
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cvmx-pko-defs.h
(181.41 KB)
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cvmx-pko.c
(32 KB)
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cvmx-pko.h
(31.29 KB)
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cvmx-platform.h
(7.45 KB)
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cvmx-pow-defs.h
(93.02 KB)
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cvmx-pow.c
(32.26 KB)
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cvmx-pow.h
(100.93 KB)
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cvmx-power-throttle.c
(7.25 KB)
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cvmx-power-throttle.h
(3.85 KB)
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cvmx-profiler.c
(7.81 KB)
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cvmx-profiler.h
(3.15 KB)
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cvmx-qlm-tables.c
(35.37 KB)
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cvmx-qlm.c
(23.41 KB)
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cvmx-qlm.h
(4.76 KB)
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cvmx-rad-defs.h
(43.58 KB)
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cvmx-raid.c
(4.71 KB)
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cvmx-raid.h
(13.02 KB)
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cvmx-resources.config
(7.66 KB)
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cvmx-rng.h
(5.02 KB)
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cvmx-rnm-defs.h
(13.03 KB)
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cvmx-rtc.h
(4.21 KB)
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cvmx-rwlock.h
(5.25 KB)
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cvmx-scratch.h
(4.76 KB)
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cvmx-shared-linux-n32.ld
(11.8 KB)
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cvmx-shared-linux-o32.ld
(10.67 KB)
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cvmx-shared-linux.ld
(11.77 KB)
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cvmx-shmem.c
(18.89 KB)
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cvmx-shmem.h
(4.11 KB)
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cvmx-sim-magic.h
(5.59 KB)
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cvmx-sli-defs.h
(312.94 KB)
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cvmx-smi-defs.h
(4.09 KB)
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cvmx-smix-defs.h
(21.71 KB)
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cvmx-spi.c
(24.99 KB)
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cvmx-spi.h
(10.22 KB)
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cvmx-spi4000.c
(19.23 KB)
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cvmx-spinlock.h
(11.73 KB)
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cvmx-spx0-defs.h
(3.94 KB)
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cvmx-spxx-defs.h
(62.44 KB)
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cvmx-srio.c
(63.05 KB)
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cvmx-srio.h
(26.68 KB)
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cvmx-sriomaintx-defs.h
(222.52 KB)
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cvmx-sriox-defs.h
(211.56 KB)
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cvmx-srxx-defs.h
(14.41 KB)
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cvmx-sso-defs.h
(87.33 KB)
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cvmx-stxx-defs.h
(34.02 KB)
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cvmx-swap.h
(4.11 KB)
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cvmx-sysinfo.c
(8.78 KB)
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cvmx-sysinfo.h
(6.45 KB)
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cvmx-thunder.c
(9.22 KB)
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cvmx-thunder.h
(4.54 KB)
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cvmx-tim-defs.h
(58.36 KB)
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cvmx-tim.c
(10.92 KB)
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cvmx-tim.h
(12.1 KB)
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cvmx-tlb.c
(10.12 KB)
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cvmx-tlb.h
(5.07 KB)
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cvmx-tra-defs.h
(4.59 KB)
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cvmx-tra.c
(31.16 KB)
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cvmx-tra.h
(34.28 KB)
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cvmx-trax-defs.h
(197.09 KB)
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cvmx-twsi.c
(16.25 KB)
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cvmx-twsi.h
(10.22 KB)
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cvmx-uahcx-defs.h
(181.38 KB)
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cvmx-uart.c
(5.69 KB)
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cvmx-uart.h
(4.58 KB)
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cvmx-uctlx-defs.h
(50.26 KB)
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cvmx-usb.c
(138.53 KB)
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cvmx-usb.h
(46.67 KB)
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cvmx-usbcx-defs.h
(259.23 KB)
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cvmx-usbd.c
(36.09 KB)
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cvmx-usbd.h
(9.82 KB)
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cvmx-usbnx-defs.h
(136.12 KB)
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cvmx-utils.h
(7.54 KB)
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cvmx-version.h
(2.23 KB)
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cvmx-warn.c
(2.75 KB)
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cvmx-warn.h
(2.43 KB)
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cvmx-wqe.h
(38.61 KB)
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cvmx-zip-defs.h
(43.18 KB)
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cvmx-zip.c
(7.37 KB)
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cvmx-zip.h
(8.5 KB)
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cvmx-zone.c
(4.7 KB)
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cvmx.h
(3.5 KB)
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octeon-boot-info.h
(8.08 KB)
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octeon-feature.c
(4.71 KB)
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octeon-feature.h
(11.94 KB)
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octeon-model.c
(15.79 KB)
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octeon-model.h
(16.53 KB)
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octeon-pci-console.c
(19.73 KB)
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octeon-pci-console.h
(5.18 KB)
Editing: cvmx-led-defs.h
/***********************license start*************** * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights * reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of Cavium Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * This Software, including technical data, may be subject to U.S. export control * laws, including the U.S. Export Administration Act and its associated * regulations, and may be subject to export or import regulations in other * countries. * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. ***********************license end**************************************/ /** * cvmx-led-defs.h * * Configuration and status register (CSR) type definitions for * Octeon led. * * This file is auto generated. Do not edit. * * <hr>$Revision$<hr> * */ #ifndef __CVMX_LED_DEFS_H__ #define __CVMX_LED_DEFS_H__ #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_BLINK CVMX_LED_BLINK_FUNC() static inline uint64_t CVMX_LED_BLINK_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_BLINK not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A48ull); } #else #define CVMX_LED_BLINK (CVMX_ADD_IO_SEG(0x0001180000001A48ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_CLK_PHASE CVMX_LED_CLK_PHASE_FUNC() static inline uint64_t CVMX_LED_CLK_PHASE_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_CLK_PHASE not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A08ull); } #else #define CVMX_LED_CLK_PHASE (CVMX_ADD_IO_SEG(0x0001180000001A08ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_CYLON CVMX_LED_CYLON_FUNC() static inline uint64_t CVMX_LED_CYLON_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_CYLON not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001AF8ull); } #else #define CVMX_LED_CYLON (CVMX_ADD_IO_SEG(0x0001180000001AF8ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_DBG CVMX_LED_DBG_FUNC() static inline uint64_t CVMX_LED_DBG_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_DBG not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A18ull); } #else #define CVMX_LED_DBG (CVMX_ADD_IO_SEG(0x0001180000001A18ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_EN CVMX_LED_EN_FUNC() static inline uint64_t CVMX_LED_EN_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_EN not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A00ull); } #else #define CVMX_LED_EN (CVMX_ADD_IO_SEG(0x0001180000001A00ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_POLARITY CVMX_LED_POLARITY_FUNC() static inline uint64_t CVMX_LED_POLARITY_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_POLARITY not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A50ull); } #else #define CVMX_LED_POLARITY (CVMX_ADD_IO_SEG(0x0001180000001A50ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_PRT CVMX_LED_PRT_FUNC() static inline uint64_t CVMX_LED_PRT_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_PRT not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A10ull); } #else #define CVMX_LED_PRT (CVMX_ADD_IO_SEG(0x0001180000001A10ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_LED_PRT_FMT CVMX_LED_PRT_FMT_FUNC() static inline uint64_t CVMX_LED_PRT_FMT_FUNC(void) { if (!(OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN58XX))) cvmx_warn("CVMX_LED_PRT_FMT not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001A30ull); } #else #define CVMX_LED_PRT_FMT (CVMX_ADD_IO_SEG(0x0001180000001A30ull)) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING static inline uint64_t CVMX_LED_PRT_STATUSX(unsigned long offset) { if (!( (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 7))) || (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 7))) || (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 7))))) cvmx_warn("CVMX_LED_PRT_STATUSX(%lu) is invalid on this chip\n", offset); return CVMX_ADD_IO_SEG(0x0001180000001A80ull) + ((offset) & 7) * 8; } #else #define CVMX_LED_PRT_STATUSX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A80ull) + ((offset) & 7) * 8) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING static inline uint64_t CVMX_LED_UDD_CNTX(unsigned long offset) { if (!( (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) cvmx_warn("CVMX_LED_UDD_CNTX(%lu) is invalid on this chip\n", offset); return CVMX_ADD_IO_SEG(0x0001180000001A20ull) + ((offset) & 1) * 8; } #else #define CVMX_LED_UDD_CNTX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A20ull) + ((offset) & 1) * 8) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING static inline uint64_t CVMX_LED_UDD_DATX(unsigned long offset) { if (!( (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) cvmx_warn("CVMX_LED_UDD_DATX(%lu) is invalid on this chip\n", offset); return CVMX_ADD_IO_SEG(0x0001180000001A38ull) + ((offset) & 1) * 8; } #else #define CVMX_LED_UDD_DATX(offset) (CVMX_ADD_IO_SEG(0x0001180000001A38ull) + ((offset) & 1) * 8) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING static inline uint64_t CVMX_LED_UDD_DAT_CLRX(unsigned long offset) { if (!( (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) cvmx_warn("CVMX_LED_UDD_DAT_CLRX(%lu) is invalid on this chip\n", offset); return CVMX_ADD_IO_SEG(0x0001180000001AC8ull) + ((offset) & 1) * 16; } #else #define CVMX_LED_UDD_DAT_CLRX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC8ull) + ((offset) & 1) * 16) #endif #if CVMX_ENABLE_CSR_ADDRESS_CHECKING static inline uint64_t CVMX_LED_UDD_DAT_SETX(unsigned long offset) { if (!( (OCTEON_IS_MODEL(OCTEON_CN38XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN56XX) && ((offset <= 1))) || (OCTEON_IS_MODEL(OCTEON_CN58XX) && ((offset <= 1))))) cvmx_warn("CVMX_LED_UDD_DAT_SETX(%lu) is invalid on this chip\n", offset); return CVMX_ADD_IO_SEG(0x0001180000001AC0ull) + ((offset) & 1) * 16; } #else #define CVMX_LED_UDD_DAT_SETX(offset) (CVMX_ADD_IO_SEG(0x0001180000001AC0ull) + ((offset) & 1) * 16) #endif /** * cvmx_led_blink * * LED_BLINK = LED Blink Rate (in led_clks) * */ union cvmx_led_blink { uint64_t u64; struct cvmx_led_blink_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63 : 56; uint64_t rate : 8; /**< LED Blink rate in led_latch clks RATE must be > 0 */ #else uint64_t rate : 8; uint64_t reserved_8_63 : 56; #endif } s; struct cvmx_led_blink_s cn38xx; struct cvmx_led_blink_s cn38xxp2; struct cvmx_led_blink_s cn56xx; struct cvmx_led_blink_s cn56xxp1; struct cvmx_led_blink_s cn58xx; struct cvmx_led_blink_s cn58xxp1; }; typedef union cvmx_led_blink cvmx_led_blink_t; /** * cvmx_led_clk_phase * * LED_CLK_PHASE = LED Clock Phase (in 64 eclks) * * * Notes: * Example: * Given a 2ns eclk, an LED_CLK_PHASE[PHASE] = 1, indicates that each * led_clk phase is 64 eclks, or 128ns. The led_clk period is 2*phase, * or 256ns which is 3.9MHz. The default value of 4, yields an led_clk * period of 64*4*2ns*2 = 1024ns or ~1MHz (977KHz). */ union cvmx_led_clk_phase { uint64_t u64; struct cvmx_led_clk_phase_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_7_63 : 57; uint64_t phase : 7; /**< Number of 64 eclks in order to create the led_clk */ #else uint64_t phase : 7; uint64_t reserved_7_63 : 57; #endif } s; struct cvmx_led_clk_phase_s cn38xx; struct cvmx_led_clk_phase_s cn38xxp2; struct cvmx_led_clk_phase_s cn56xx; struct cvmx_led_clk_phase_s cn56xxp1; struct cvmx_led_clk_phase_s cn58xx; struct cvmx_led_clk_phase_s cn58xxp1; }; typedef union cvmx_led_clk_phase cvmx_led_clk_phase_t; /** * cvmx_led_cylon * * LED_CYLON = LED CYLON Effect (should remain undocumented) * */ union cvmx_led_cylon { uint64_t u64; struct cvmx_led_cylon_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_16_63 : 48; uint64_t rate : 16; /**< LED Cylon Effect when RATE!=0 Changes at RATE*LATCH period */ #else uint64_t rate : 16; uint64_t reserved_16_63 : 48; #endif } s; struct cvmx_led_cylon_s cn38xx; struct cvmx_led_cylon_s cn38xxp2; struct cvmx_led_cylon_s cn56xx; struct cvmx_led_cylon_s cn56xxp1; struct cvmx_led_cylon_s cn58xx; struct cvmx_led_cylon_s cn58xxp1; }; typedef union cvmx_led_cylon cvmx_led_cylon_t; /** * cvmx_led_dbg * * LED_DBG = LED Debug Port information * */ union cvmx_led_dbg { uint64_t u64; struct cvmx_led_dbg_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63 : 63; uint64_t dbg_en : 1; /**< Add Debug Port Data to the LED shift chain Debug Data is shifted out LSB to MSB */ #else uint64_t dbg_en : 1; uint64_t reserved_1_63 : 63; #endif } s; struct cvmx_led_dbg_s cn38xx; struct cvmx_led_dbg_s cn38xxp2; struct cvmx_led_dbg_s cn56xx; struct cvmx_led_dbg_s cn56xxp1; struct cvmx_led_dbg_s cn58xx; struct cvmx_led_dbg_s cn58xxp1; }; typedef union cvmx_led_dbg cvmx_led_dbg_t; /** * cvmx_led_en * * LED_EN = LED Interface Enable * * * Notes: * The LED interface is comprised of a shift chain with a parallel latch. LED * data is shifted out on each fallingg edge of led_clk and then captured by * led_lat. * * The LED shift chain is comprised of the following... * * 32 - UDD header * 6x8 - per port status * 17 - debug port * 32 - UDD trailer * * for a total of 129 bits. * * UDD header is programmable from 0-32 bits (LED_UDD_CNT0) and will shift out * LSB to MSB (LED_UDD_DAT0[0], LED_UDD_DAT0[1], * ... LED_UDD_DAT0[LED_UDD_CNT0]. * * The per port status is also variable. Systems can control which ports send * data (LED_PRT) as well as the status content (LED_PRT_FMT and * LED_PRT_STATUS*). When multiple ports are enabled, they come out in lowest * port to highest port (prt0, prt1, ...). * * The debug port data can also be added to the LED chain (LED_DBG). When * enabled, the debug data shifts out LSB to MSB. * * The UDD trailer data is identical to the header data, but uses LED_UDD_CNT1 * and LED_UDD_DAT1. */ union cvmx_led_en { uint64_t u64; struct cvmx_led_en_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63 : 63; uint64_t en : 1; /**< Enable the LED interface shift-chain */ #else uint64_t en : 1; uint64_t reserved_1_63 : 63; #endif } s; struct cvmx_led_en_s cn38xx; struct cvmx_led_en_s cn38xxp2; struct cvmx_led_en_s cn56xx; struct cvmx_led_en_s cn56xxp1; struct cvmx_led_en_s cn58xx; struct cvmx_led_en_s cn58xxp1; }; typedef union cvmx_led_en cvmx_led_en_t; /** * cvmx_led_polarity * * LED_POLARITY = LED Polarity * */ union cvmx_led_polarity { uint64_t u64; struct cvmx_led_polarity_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_1_63 : 63; uint64_t polarity : 1; /**< LED active polarity 0 = active HIGH LED 1 = active LOW LED (invert led_dat) */ #else uint64_t polarity : 1; uint64_t reserved_1_63 : 63; #endif } s; struct cvmx_led_polarity_s cn38xx; struct cvmx_led_polarity_s cn38xxp2; struct cvmx_led_polarity_s cn56xx; struct cvmx_led_polarity_s cn56xxp1; struct cvmx_led_polarity_s cn58xx; struct cvmx_led_polarity_s cn58xxp1; }; typedef union cvmx_led_polarity cvmx_led_polarity_t; /** * cvmx_led_prt * * LED_PRT = LED Port status information * * * Notes: * Note: * the PRT vector enables information of the 8 RGMII ports connected to * Octane. It does not reflect the actual programmed PHY addresses. */ union cvmx_led_prt { uint64_t u64; struct cvmx_led_prt_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_8_63 : 56; uint64_t prt_en : 8; /**< Which ports are enabled to display status PRT_EN<3:0> coresponds to RGMII ports 3-0 on int0 PRT_EN<7:4> coresponds to RGMII ports 7-4 on int1 Only applies when interface is in RGMII mode The status format is defined by LED_PRT_FMT */ #else uint64_t prt_en : 8; uint64_t reserved_8_63 : 56; #endif } s; struct cvmx_led_prt_s cn38xx; struct cvmx_led_prt_s cn38xxp2; struct cvmx_led_prt_s cn56xx; struct cvmx_led_prt_s cn56xxp1; struct cvmx_led_prt_s cn58xx; struct cvmx_led_prt_s cn58xxp1; }; typedef union cvmx_led_prt cvmx_led_prt_t; /** * cvmx_led_prt_fmt * * LED_PRT_FMT = LED Port Status Infomation Format * * * Notes: * TX: RGMII TX block is sending packet data or extends on the port * RX: RGMII RX block has received non-idle cycle * * For short transfers, LEDs will remain on for at least one blink cycle */ union cvmx_led_prt_fmt { uint64_t u64; struct cvmx_led_prt_fmt_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_4_63 : 60; uint64_t format : 4; /**< Port Status Information for each enabled port in LED_PRT. The formats are below 0x0: [ LED_PRT_STATUS[0] ] 0x1: [ LED_PRT_STATUS[1:0] ] 0x2: [ LED_PRT_STATUS[3:0] ] 0x3: [ LED_PRT_STATUS[5:0] ] 0x4: [ (RX|TX), LED_PRT_STATUS[0] ] 0x5: [ (RX|TX), LED_PRT_STATUS[1:0] ] 0x6: [ (RX|TX), LED_PRT_STATUS[3:0] ] 0x8: [ Tx, Rx, LED_PRT_STATUS[0] ] 0x9: [ Tx, Rx, LED_PRT_STATUS[1:0] ] 0xa: [ Tx, Rx, LED_PRT_STATUS[3:0] ] */ #else uint64_t format : 4; uint64_t reserved_4_63 : 60; #endif } s; struct cvmx_led_prt_fmt_s cn38xx; struct cvmx_led_prt_fmt_s cn38xxp2; struct cvmx_led_prt_fmt_s cn56xx; struct cvmx_led_prt_fmt_s cn56xxp1; struct cvmx_led_prt_fmt_s cn58xx; struct cvmx_led_prt_fmt_s cn58xxp1; }; typedef union cvmx_led_prt_fmt cvmx_led_prt_fmt_t; /** * cvmx_led_prt_status# * * LED_PRT_STATUS = LED Port Status information * */ union cvmx_led_prt_statusx { uint64_t u64; struct cvmx_led_prt_statusx_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63 : 58; uint64_t status : 6; /**< Bits that software can set to be added to the LED shift chain - depending on LED_PRT_FMT LED_PRT_STATUS(3..0) corespond to RGMII ports 3-0 on interface0 LED_PRT_STATUS(7..4) corespond to RGMII ports 7-4 on interface1 Only applies when interface is in RGMII mode */ #else uint64_t status : 6; uint64_t reserved_6_63 : 58; #endif } s; struct cvmx_led_prt_statusx_s cn38xx; struct cvmx_led_prt_statusx_s cn38xxp2; struct cvmx_led_prt_statusx_s cn56xx; struct cvmx_led_prt_statusx_s cn56xxp1; struct cvmx_led_prt_statusx_s cn58xx; struct cvmx_led_prt_statusx_s cn58xxp1; }; typedef union cvmx_led_prt_statusx cvmx_led_prt_statusx_t; /** * cvmx_led_udd_cnt# * * LED_UDD_CNT = LED UDD Counts * */ union cvmx_led_udd_cntx { uint64_t u64; struct cvmx_led_udd_cntx_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_6_63 : 58; uint64_t cnt : 6; /**< Number of bits of user-defined data to include in the LED shift chain. Legal values: 0-32. */ #else uint64_t cnt : 6; uint64_t reserved_6_63 : 58; #endif } s; struct cvmx_led_udd_cntx_s cn38xx; struct cvmx_led_udd_cntx_s cn38xxp2; struct cvmx_led_udd_cntx_s cn56xx; struct cvmx_led_udd_cntx_s cn56xxp1; struct cvmx_led_udd_cntx_s cn58xx; struct cvmx_led_udd_cntx_s cn58xxp1; }; typedef union cvmx_led_udd_cntx cvmx_led_udd_cntx_t; /** * cvmx_led_udd_dat# * * LED_UDD_DAT = User defined data (header or trailer) * * * Notes: * Bits come out LSB to MSB on the shift chain. If LED_UDD_CNT is set to 4 * then the bits comes out LED_UDD_DAT[0], LED_UDD_DAT[1], LED_UDD_DAT[2], * LED_UDD_DAT[3]. */ union cvmx_led_udd_datx { uint64_t u64; struct cvmx_led_udd_datx_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63 : 32; uint64_t dat : 32; /**< Header or trailer UDD data to be displayed on the LED shift chain. Number of bits to include is controled by LED_UDD_CNT */ #else uint64_t dat : 32; uint64_t reserved_32_63 : 32; #endif } s; struct cvmx_led_udd_datx_s cn38xx; struct cvmx_led_udd_datx_s cn38xxp2; struct cvmx_led_udd_datx_s cn56xx; struct cvmx_led_udd_datx_s cn56xxp1; struct cvmx_led_udd_datx_s cn58xx; struct cvmx_led_udd_datx_s cn58xxp1; }; typedef union cvmx_led_udd_datx cvmx_led_udd_datx_t; /** * cvmx_led_udd_dat_clr# * * LED_UDD_DAT_CLR = User defined data (header or trailer) * */ union cvmx_led_udd_dat_clrx { uint64_t u64; struct cvmx_led_udd_dat_clrx_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63 : 32; uint64_t clr : 32; /**< Bitwise clear for the Header or trailer UDD data to be displayed on the LED shift chain. */ #else uint64_t clr : 32; uint64_t reserved_32_63 : 32; #endif } s; struct cvmx_led_udd_dat_clrx_s cn38xx; struct cvmx_led_udd_dat_clrx_s cn38xxp2; struct cvmx_led_udd_dat_clrx_s cn56xx; struct cvmx_led_udd_dat_clrx_s cn56xxp1; struct cvmx_led_udd_dat_clrx_s cn58xx; struct cvmx_led_udd_dat_clrx_s cn58xxp1; }; typedef union cvmx_led_udd_dat_clrx cvmx_led_udd_dat_clrx_t; /** * cvmx_led_udd_dat_set# * * LED_UDD_DAT_SET = User defined data (header or trailer) * */ union cvmx_led_udd_dat_setx { uint64_t u64; struct cvmx_led_udd_dat_setx_s { #ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_32_63 : 32; uint64_t set : 32; /**< Bitwise set for the Header or trailer UDD data to be displayed on the LED shift chain. */ #else uint64_t set : 32; uint64_t reserved_32_63 : 32; #endif } s; struct cvmx_led_udd_dat_setx_s cn38xx; struct cvmx_led_udd_dat_setx_s cn38xxp2; struct cvmx_led_udd_dat_setx_s cn56xx; struct cvmx_led_udd_dat_setx_s cn56xxp1; struct cvmx_led_udd_dat_setx_s cn58xx; struct cvmx_led_udd_dat_setx_s cn58xxp1; }; typedef union cvmx_led_udd_dat_setx cvmx_led_udd_dat_setx_t; #endif
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