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📄 cvmip.h(5.88 KB)
📄 cvmx-abi.h(3.67 KB)
📄 cvmx-access-native.h(26.79 KB)
📄 cvmx-access.h(7.82 KB)
📄 cvmx-address.h(10.26 KB)
📄 cvmx-agl-defs.h(213.66 KB)
📄 cvmx-app-hotplug.c(27.64 KB)
📄 cvmx-app-hotplug.h(5.77 KB)
📄 cvmx-app-init-linux.c(14.29 KB)
📄 cvmx-app-init.c(22.54 KB)
📄 cvmx-app-init.h(19.32 KB)
📄 cvmx-asm.h(39.3 KB)
📄 cvmx-asx0-defs.h(5.19 KB)
📄 cvmx-asxx-defs.h(50.57 KB)
📄 cvmx-atomic.h(21.71 KB)
📄 cvmx-bootloader.h(5.64 KB)
📄 cvmx-bootmem.c(40.91 KB)
📄 cvmx-bootmem.h(18.88 KB)
📄 cvmx-ciu-defs.h(702.5 KB)
📄 cvmx-ciu2-defs.h(487.31 KB)
📄 cvmx-clock.c(4.48 KB)
📄 cvmx-clock.h(4.43 KB)
📄 cvmx-cmd-queue.c(11.84 KB)
📄 cvmx-cmd-queue.h(22 KB)
📄 cvmx-cn3010-evb-hs5.c(6.05 KB)
📄 cvmx-cn3010-evb-hs5.h(2.3 KB)
📄 cvmx-compactflash.c(12.8 KB)
📄 cvmx-compactflash.h(3.05 KB)
📄 cvmx-core.c(5.3 KB)
📄 cvmx-core.h(9.46 KB)
📄 cvmx-coremask.c(4.12 KB)
📄 cvmx-coremask.h(8.11 KB)
📄 cvmx-crypto.c(2.6 KB)
📄 cvmx-crypto.h(2.54 KB)
📄 cvmx-csr-enums.h(8.45 KB)
📄 cvmx-csr-typedefs.h(3.92 KB)
📄 cvmx-csr.h(11.46 KB)
📄 cvmx-dbg-defs.h(6.28 KB)
📄 cvmx-debug-handler.S(7.44 KB)
📄 cvmx-debug-remote.c(3.24 KB)
📄 cvmx-debug-uart.c(7.88 KB)
📄 cvmx-debug.c(55.98 KB)
📄 cvmx-debug.h(22.2 KB)
📄 cvmx-dfa-defs.h(383.08 KB)
📄 cvmx-dfa.c(3.7 KB)
📄 cvmx-dfa.h(34.87 KB)
📄 cvmx-dfm-defs.h(205.93 KB)
📄 cvmx-dma-engine.c(20.25 KB)
📄 cvmx-dma-engine.h(24.06 KB)
📄 cvmx-dpi-defs.h(107.61 KB)
📄 cvmx-ebt3000.c(3.82 KB)
📄 cvmx-ebt3000.h(2.25 KB)
📄 cvmx-endor-defs.h(311.42 KB)
📄 cvmx-eoi-defs.h(26.27 KB)
📄 cvmx-fau.h(20.31 KB)
📄 cvmx-flash.c(22.46 KB)
📄 cvmx-flash.h(3.8 KB)
📄 cvmx-fpa-defs.h(157.78 KB)
📄 cvmx-fpa.c(6.63 KB)
📄 cvmx-fpa.h(10.39 KB)
📄 cvmx-gmx.h(3.07 KB)
📄 cvmx-gmxx-defs.h(505.27 KB)
📄 cvmx-gpio-defs.h(36.89 KB)
📄 cvmx-gpio.h(5.48 KB)
📄 cvmx-helper-board.c(58 KB)
📄 cvmx-helper-board.h(7.82 KB)
📄 cvmx-helper-cfg.c(18.68 KB)
📄 cvmx-helper-cfg.h(8.1 KB)
📄 cvmx-helper-check-defines.h(4.1 KB)
📄 cvmx-helper-errata.c(11.91 KB)
📄 cvmx-helper-errata.h(3.24 KB)
📄 cvmx-helper-fpa.c(8.81 KB)
📄 cvmx-helper-fpa.h(3.21 KB)
📄 cvmx-helper-ilk.c(12.74 KB)
📄 cvmx-helper-ilk.h(3.58 KB)
📄 cvmx-helper-jtag.c(7.05 KB)
📄 cvmx-helper-jtag.h(3.91 KB)
📄 cvmx-helper-loop.c(4.35 KB)
📄 cvmx-helper-loop.h(2.78 KB)
📄 cvmx-helper-npi.c(5.72 KB)
📄 cvmx-helper-npi.h(2.82 KB)
📄 cvmx-helper-rgmii.c(19.12 KB)
📄 cvmx-helper-rgmii.h(4.5 KB)
📄 cvmx-helper-sgmii.c(27.09 KB)
📄 cvmx-helper-sgmii.h(4.3 KB)
📄 cvmx-helper-spi.c(8.4 KB)
📄 cvmx-helper-spi.h(3.68 KB)
📄 cvmx-helper-srio.c(11.58 KB)
📄 cvmx-helper-srio.h(3.6 KB)
📄 cvmx-helper-util.c(25.77 KB)
📄 cvmx-helper-util.h(9.88 KB)
📄 cvmx-helper-xaui.c(16.54 KB)
📄 cvmx-helper-xaui.h(4.29 KB)
📄 cvmx-helper.c(69.71 KB)
📄 cvmx-helper.h(12.7 KB)
📄 cvmx-hfa.c(5.04 KB)
📄 cvmx-hfa.h(10.3 KB)
📄 cvmx-higig.h(23.21 KB)
📄 cvmx-ilk-defs.h(170.31 KB)
📄 cvmx-ilk.c(45.16 KB)
📄 cvmx-ilk.h(5.89 KB)
📄 cvmx-interrupt-handler.S(5.87 KB)
📄 cvmx-interrupt.c(47.42 KB)
📄 cvmx-interrupt.h(8.07 KB)
📄 cvmx-iob-defs.h(89.11 KB)
📄 cvmx-iob1-defs.h(6.8 KB)
📄 cvmx-ipd-defs.h(186.51 KB)
📄 cvmx-ipd.c(12.88 KB)
📄 cvmx-ipd.h(6.3 KB)
📄 cvmx-ixf18201.c(12.8 KB)
📄 cvmx-ixf18201.h(3.54 KB)
📄 cvmx-key-defs.h(11 KB)
📄 cvmx-key.h(3.29 KB)
📄 cvmx-l2c-defs.h(353.27 KB)
📄 cvmx-l2c.c(52.95 KB)
📄 cvmx-l2c.h(19.72 KB)
📄 cvmx-l2d-defs.h(60.71 KB)
📄 cvmx-l2t-defs.h(50.68 KB)
📄 cvmx-led-defs.h(22.68 KB)
📄 cvmx-llm.c(36.51 KB)
📄 cvmx-llm.h(11.72 KB)
📄 cvmx-lmcx-defs.h(532.21 KB)
📄 cvmx-log-arc.S(5.67 KB)
📄 cvmx-log.c(18.26 KB)
📄 cvmx-log.h(4.95 KB)
📁 cvmx-malloc
📄 cvmx-malloc.h(7.2 KB)
📄 cvmx-mdio.h(15.99 KB)
📄 cvmx-mgmt-port.c(36.2 KB)
📄 cvmx-mgmt-port.h(7.23 KB)
📄 cvmx-mio-defs.h(454.14 KB)
📄 cvmx-mixx-defs.h(94.59 KB)
📄 cvmx-mpi-defs.h(33.42 KB)
📄 cvmx-nand.c(76.64 KB)
📄 cvmx-nand.h(26.85 KB)
📄 cvmx-ndf-defs.h(25.53 KB)
📄 cvmx-npei-defs.h(378.19 KB)
📄 cvmx-npi-defs.h(252.36 KB)
📄 cvmx-npi.h(4.69 KB)
📄 cvmx-packet.h(2.94 KB)
📄 cvmx-pci-defs.h(250.53 KB)
📄 cvmx-pci.h(2.37 KB)
📄 cvmx-pcie.c(63 KB)
📄 cvmx-pcie.h(10.08 KB)
📄 cvmx-pcieepx-defs.h(304.49 KB)
📄 cvmx-pciercx-defs.h(284.89 KB)
📄 cvmx-pcm-defs.h(12.34 KB)
📄 cvmx-pcmx-defs.h(46.12 KB)
📄 cvmx-pcsx-defs.h(71.23 KB)
📄 cvmx-pcsxx-defs.h(45.79 KB)
📄 cvmx-pemx-defs.h(68.97 KB)
📄 cvmx-pescx-defs.h(49.92 KB)
📄 cvmx-pexp-defs.h(97.89 KB)
📄 cvmx-pip-defs.h(315.91 KB)
📄 cvmx-pip.h(33.65 KB)
📄 cvmx-pko-defs.h(181.41 KB)
📄 cvmx-pko.c(32 KB)
📄 cvmx-pko.h(31.29 KB)
📄 cvmx-platform.h(7.45 KB)
📄 cvmx-pow-defs.h(93.02 KB)
📄 cvmx-pow.c(32.26 KB)
📄 cvmx-pow.h(100.93 KB)
📄 cvmx-power-throttle.c(7.25 KB)
📄 cvmx-power-throttle.h(3.85 KB)
📄 cvmx-profiler.c(7.81 KB)
📄 cvmx-profiler.h(3.15 KB)
📄 cvmx-qlm-tables.c(35.37 KB)
📄 cvmx-qlm.c(23.41 KB)
📄 cvmx-qlm.h(4.76 KB)
📄 cvmx-rad-defs.h(43.58 KB)
📄 cvmx-raid.c(4.71 KB)
📄 cvmx-raid.h(13.02 KB)
📄 cvmx-resources.config(7.66 KB)
📄 cvmx-rng.h(5.02 KB)
📄 cvmx-rnm-defs.h(13.03 KB)
📄 cvmx-rtc.h(4.21 KB)
📄 cvmx-rwlock.h(5.25 KB)
📄 cvmx-scratch.h(4.76 KB)
📄 cvmx-shared-linux-n32.ld(11.8 KB)
📄 cvmx-shared-linux-o32.ld(10.67 KB)
📄 cvmx-shared-linux.ld(11.77 KB)
📄 cvmx-shmem.c(18.89 KB)
📄 cvmx-shmem.h(4.11 KB)
📄 cvmx-sim-magic.h(5.59 KB)
📄 cvmx-sli-defs.h(312.94 KB)
📄 cvmx-smi-defs.h(4.09 KB)
📄 cvmx-smix-defs.h(21.71 KB)
📄 cvmx-spi.c(24.99 KB)
📄 cvmx-spi.h(10.22 KB)
📄 cvmx-spi4000.c(19.23 KB)
📄 cvmx-spinlock.h(11.73 KB)
📄 cvmx-spx0-defs.h(3.94 KB)
📄 cvmx-spxx-defs.h(62.44 KB)
📄 cvmx-srio.c(63.05 KB)
📄 cvmx-srio.h(26.68 KB)
📄 cvmx-sriomaintx-defs.h(222.52 KB)
📄 cvmx-sriox-defs.h(211.56 KB)
📄 cvmx-srxx-defs.h(14.41 KB)
📄 cvmx-sso-defs.h(87.33 KB)
📄 cvmx-stxx-defs.h(34.02 KB)
📄 cvmx-swap.h(4.11 KB)
📄 cvmx-sysinfo.c(8.78 KB)
📄 cvmx-sysinfo.h(6.45 KB)
📄 cvmx-thunder.c(9.22 KB)
📄 cvmx-thunder.h(4.54 KB)
📄 cvmx-tim-defs.h(58.36 KB)
📄 cvmx-tim.c(10.92 KB)
📄 cvmx-tim.h(12.1 KB)
📄 cvmx-tlb.c(10.12 KB)
📄 cvmx-tlb.h(5.07 KB)
📄 cvmx-tra-defs.h(4.59 KB)
📄 cvmx-tra.c(31.16 KB)
📄 cvmx-tra.h(34.28 KB)
📄 cvmx-trax-defs.h(197.09 KB)
📄 cvmx-twsi.c(16.25 KB)
📄 cvmx-twsi.h(10.22 KB)
📄 cvmx-uahcx-defs.h(181.38 KB)
📄 cvmx-uart.c(5.69 KB)
📄 cvmx-uart.h(4.58 KB)
📄 cvmx-uctlx-defs.h(50.26 KB)
📄 cvmx-usb.c(138.53 KB)
📄 cvmx-usb.h(46.67 KB)
📄 cvmx-usbcx-defs.h(259.23 KB)
📄 cvmx-usbd.c(36.09 KB)
📄 cvmx-usbd.h(9.82 KB)
📄 cvmx-usbnx-defs.h(136.12 KB)
📄 cvmx-utils.h(7.54 KB)
📄 cvmx-version.h(2.23 KB)
📄 cvmx-warn.c(2.75 KB)
📄 cvmx-warn.h(2.43 KB)
📄 cvmx-wqe.h(38.61 KB)
📄 cvmx-zip-defs.h(43.18 KB)
📄 cvmx-zip.c(7.37 KB)
📄 cvmx-zip.h(8.5 KB)
📄 cvmx-zone.c(4.7 KB)
📄 cvmx.h(3.5 KB)
📄 octeon-boot-info.h(8.08 KB)
📄 octeon-feature.c(4.71 KB)
📄 octeon-feature.h(11.94 KB)
📄 octeon-model.c(15.79 KB)
📄 octeon-model.h(16.53 KB)
📄 octeon-pci-console.c(19.73 KB)
📄 octeon-pci-console.h(5.18 KB)

Editing: cvmx-rnm-defs.h

/***********************license start***************
 * Copyright (c) 2003-2012  Cavium Inc. (support@cavium.com). All rights
 * reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *
 *   * Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *
 *   * Redistributions in binary form must reproduce the above
 *     copyright notice, this list of conditions and the following
 *     disclaimer in the documentation and/or other materials provided
 *     with the distribution.

*   * Neither the name of Cavium Inc. nor the names of
 *     its contributors may be used to endorse or promote products
 *     derived from this software without specific prior written
 *     permission.

* This Software, including technical data, may be subject to U.S. export  control
 * laws, including the U.S. Export Administration Act and its  associated
 * regulations, and may be subject to export or import  regulations in other
 * countries.

* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
 ***********************license end**************************************/

/**
 * cvmx-rnm-defs.h
 *
 * Configuration and status register (CSR) type definitions for
 * Octeon rnm.
 *
 * This file is auto generated. Do not edit.
 *
 * <hr>$Revision$<hr>
 *
 */
#ifndef __CVMX_RNM_DEFS_H__
#define __CVMX_RNM_DEFS_H__

#define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
#define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_RNM_EER_DBG CVMX_RNM_EER_DBG_FUNC()
static inline uint64_t CVMX_RNM_EER_DBG_FUNC(void)
{
	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
		cvmx_warn("CVMX_RNM_EER_DBG not supported on this chip\n");
	return CVMX_ADD_IO_SEG(0x0001180040000018ull);
}
#else
#define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
#endif
#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_RNM_EER_KEY CVMX_RNM_EER_KEY_FUNC()
static inline uint64_t CVMX_RNM_EER_KEY_FUNC(void)
{
	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
		cvmx_warn("CVMX_RNM_EER_KEY not supported on this chip\n");
	return CVMX_ADD_IO_SEG(0x0001180040000010ull);
}
#else
#define CVMX_RNM_EER_KEY (CVMX_ADD_IO_SEG(0x0001180040000010ull))
#endif
#if CVMX_ENABLE_CSR_ADDRESS_CHECKING
#define CVMX_RNM_SERIAL_NUM CVMX_RNM_SERIAL_NUM_FUNC()
static inline uint64_t CVMX_RNM_SERIAL_NUM_FUNC(void)
{
	if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX)))
		cvmx_warn("CVMX_RNM_SERIAL_NUM not supported on this chip\n");
	return CVMX_ADD_IO_SEG(0x0001180040000020ull);
}
#else
#define CVMX_RNM_SERIAL_NUM (CVMX_ADD_IO_SEG(0x0001180040000020ull))
#endif

/**
 * cvmx_rnm_bist_status
 *
 * RNM_BIST_STATUS = RNM's BIST Status Register
 *
 * The RNM's Memory Bist Status register.
 */
union cvmx_rnm_bist_status {
	uint64_t u64;
	struct cvmx_rnm_bist_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_2_63                : 62;
	uint64_t rrc                          : 1;  /**< Status of RRC block bist. */
	uint64_t mem                          : 1;  /**< Status of MEM block bist. */
#else
	uint64_t mem                          : 1;
	uint64_t rrc                          : 1;
	uint64_t reserved_2_63                : 62;
#endif
	} s;
	struct cvmx_rnm_bist_status_s         cn30xx;
	struct cvmx_rnm_bist_status_s         cn31xx;
	struct cvmx_rnm_bist_status_s         cn38xx;
	struct cvmx_rnm_bist_status_s         cn38xxp2;
	struct cvmx_rnm_bist_status_s         cn50xx;
	struct cvmx_rnm_bist_status_s         cn52xx;
	struct cvmx_rnm_bist_status_s         cn52xxp1;
	struct cvmx_rnm_bist_status_s         cn56xx;
	struct cvmx_rnm_bist_status_s         cn56xxp1;
	struct cvmx_rnm_bist_status_s         cn58xx;
	struct cvmx_rnm_bist_status_s         cn58xxp1;
	struct cvmx_rnm_bist_status_s         cn61xx;
	struct cvmx_rnm_bist_status_s         cn63xx;
	struct cvmx_rnm_bist_status_s         cn63xxp1;
	struct cvmx_rnm_bist_status_s         cn66xx;
	struct cvmx_rnm_bist_status_s         cn68xx;
	struct cvmx_rnm_bist_status_s         cn68xxp1;
	struct cvmx_rnm_bist_status_s         cnf71xx;
};
typedef union cvmx_rnm_bist_status cvmx_rnm_bist_status_t;

/**
 * cvmx_rnm_ctl_status
 *
 * RNM_CTL_STATUS = RNM's Control/Status Register
 *
 * The RNM's interrupt enable register.
 */
union cvmx_rnm_ctl_status {
	uint64_t u64;
	struct cvmx_rnm_ctl_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_12_63               : 52;
	uint64_t dis_mak                      : 1;  /**< Disable use of Master AES KEY */
	uint64_t eer_lck                      : 1;  /**< Encryption enable register locked */
	uint64_t eer_val                      : 1;  /**< Dormant encryption key match */
	uint64_t ent_sel                      : 4;  /**< ? */
	uint64_t exp_ent                      : 1;  /**< Exported entropy enable for random number generator */
	uint64_t rng_rst                      : 1;  /**< Reset RNG as core reset. */
	uint64_t rnm_rst                      : 1;  /**< Reset the RNM as core reset except for register
                                                         logic. */
	uint64_t rng_en                       : 1;  /**< Enable the output of the RNG. */
	uint64_t ent_en                       : 1;  /**< Entropy enable for random number generator. */
#else
	uint64_t ent_en                       : 1;
	uint64_t rng_en                       : 1;
	uint64_t rnm_rst                      : 1;
	uint64_t rng_rst                      : 1;
	uint64_t exp_ent                      : 1;
	uint64_t ent_sel                      : 4;
	uint64_t eer_val                      : 1;
	uint64_t eer_lck                      : 1;
	uint64_t dis_mak                      : 1;
	uint64_t reserved_12_63               : 52;
#endif
	} s;
	struct cvmx_rnm_ctl_status_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_4_63                : 60;
	uint64_t rng_rst                      : 1;  /**< Reset RNG as core reset. */
	uint64_t rnm_rst                      : 1;  /**< Reset the RNM as core reset except for register
                                                         logic. */
	uint64_t rng_en                       : 1;  /**< Enable the output of the RNG. */
	uint64_t ent_en                       : 1;  /**< Entropy enable for random number generator. */
#else
	uint64_t ent_en                       : 1;
	uint64_t rng_en                       : 1;
	uint64_t rnm_rst                      : 1;
	uint64_t rng_rst                      : 1;
	uint64_t reserved_4_63                : 60;
#endif
	} cn30xx;
	struct cvmx_rnm_ctl_status_cn30xx     cn31xx;
	struct cvmx_rnm_ctl_status_cn30xx     cn38xx;
	struct cvmx_rnm_ctl_status_cn30xx     cn38xxp2;
	struct cvmx_rnm_ctl_status_cn50xx {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_9_63                : 55;
	uint64_t ent_sel                      : 4;  /**< ? */
	uint64_t exp_ent                      : 1;  /**< Exported entropy enable for random number generator */
	uint64_t rng_rst                      : 1;  /**< Reset RNG as core reset. */
	uint64_t rnm_rst                      : 1;  /**< Reset the RNM as core reset except for register
                                                         logic. */
	uint64_t rng_en                       : 1;  /**< Enable the output of the RNG. */
	uint64_t ent_en                       : 1;  /**< Entropy enable for random number generator. */
#else
	uint64_t ent_en                       : 1;
	uint64_t rng_en                       : 1;
	uint64_t rnm_rst                      : 1;
	uint64_t rng_rst                      : 1;
	uint64_t exp_ent                      : 1;
	uint64_t ent_sel                      : 4;
	uint64_t reserved_9_63                : 55;
#endif
	} cn50xx;
	struct cvmx_rnm_ctl_status_cn50xx     cn52xx;
	struct cvmx_rnm_ctl_status_cn50xx     cn52xxp1;
	struct cvmx_rnm_ctl_status_cn50xx     cn56xx;
	struct cvmx_rnm_ctl_status_cn50xx     cn56xxp1;
	struct cvmx_rnm_ctl_status_cn50xx     cn58xx;
	struct cvmx_rnm_ctl_status_cn50xx     cn58xxp1;
	struct cvmx_rnm_ctl_status_s          cn61xx;
	struct cvmx_rnm_ctl_status_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t reserved_11_63               : 53;
	uint64_t eer_lck                      : 1;  /**< Encryption enable register locked */
	uint64_t eer_val                      : 1;  /**< Dormant encryption key match */
	uint64_t ent_sel                      : 4;  /**< ? */
	uint64_t exp_ent                      : 1;  /**< Exported entropy enable for random number generator */
	uint64_t rng_rst                      : 1;  /**< Reset RNG as core reset. */
	uint64_t rnm_rst                      : 1;  /**< Reset the RNM as core reset except for register
                                                         logic. */
	uint64_t rng_en                       : 1;  /**< Enable the output of the RNG. */
	uint64_t ent_en                       : 1;  /**< Entropy enable for random number generator. */
#else
	uint64_t ent_en                       : 1;
	uint64_t rng_en                       : 1;
	uint64_t rnm_rst                      : 1;
	uint64_t rng_rst                      : 1;
	uint64_t exp_ent                      : 1;
	uint64_t ent_sel                      : 4;
	uint64_t eer_val                      : 1;
	uint64_t eer_lck                      : 1;
	uint64_t reserved_11_63               : 53;
#endif
	} cn63xx;
	struct cvmx_rnm_ctl_status_cn63xx     cn63xxp1;
	struct cvmx_rnm_ctl_status_s          cn66xx;
	struct cvmx_rnm_ctl_status_cn63xx     cn68xx;
	struct cvmx_rnm_ctl_status_cn63xx     cn68xxp1;
	struct cvmx_rnm_ctl_status_s          cnf71xx;
};
typedef union cvmx_rnm_ctl_status cvmx_rnm_ctl_status_t;

/**
 * cvmx_rnm_eer_dbg
 *
 * RNM_EER_DBG = RNM's Encryption enable debug register
 *
 * The RNM's Encryption enable debug register
 */
union cvmx_rnm_eer_dbg {
	uint64_t u64;
	struct cvmx_rnm_eer_dbg_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t dat                          : 64; /**< Dormant encryption debug info. */
#else
	uint64_t dat                          : 64;
#endif
	} s;
	struct cvmx_rnm_eer_dbg_s             cn61xx;
	struct cvmx_rnm_eer_dbg_s             cn63xx;
	struct cvmx_rnm_eer_dbg_s             cn63xxp1;
	struct cvmx_rnm_eer_dbg_s             cn66xx;
	struct cvmx_rnm_eer_dbg_s             cn68xx;
	struct cvmx_rnm_eer_dbg_s             cn68xxp1;
	struct cvmx_rnm_eer_dbg_s             cnf71xx;
};
typedef union cvmx_rnm_eer_dbg cvmx_rnm_eer_dbg_t;

/**
 * cvmx_rnm_eer_key
 *
 * RNM_EER_KEY = RNM's Encryption enable register
 *
 * The RNM's Encryption enable register
 */
union cvmx_rnm_eer_key {
	uint64_t u64;
	struct cvmx_rnm_eer_key_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t key                          : 64; /**< Dormant encryption key.  If dormant crypto is fuse
                                                         enabled, crypto can be enable by writing this
                                                         register with the correct key. */
#else
	uint64_t key                          : 64;
#endif
	} s;
	struct cvmx_rnm_eer_key_s             cn61xx;
	struct cvmx_rnm_eer_key_s             cn63xx;
	struct cvmx_rnm_eer_key_s             cn63xxp1;
	struct cvmx_rnm_eer_key_s             cn66xx;
	struct cvmx_rnm_eer_key_s             cn68xx;
	struct cvmx_rnm_eer_key_s             cn68xxp1;
	struct cvmx_rnm_eer_key_s             cnf71xx;
};
typedef union cvmx_rnm_eer_key cvmx_rnm_eer_key_t;

/**
 * cvmx_rnm_serial_num
 *
 * RNM_SERIAL_NUM = RNM's fuse serial number register
 *
 * The RNM's fuse serial number register
 *
 * Notes:
 * Added RNM_SERIAL_NUM in pass 2.0
 *
 */
union cvmx_rnm_serial_num {
	uint64_t u64;
	struct cvmx_rnm_serial_num_s {
#ifdef __BIG_ENDIAN_BITFIELD
	uint64_t dat                          : 64; /**< Dormant encryption serial number */
#else
	uint64_t dat                          : 64;
#endif
	} s;
	struct cvmx_rnm_serial_num_s          cn61xx;
	struct cvmx_rnm_serial_num_s          cn63xx;
	struct cvmx_rnm_serial_num_s          cn66xx;
	struct cvmx_rnm_serial_num_s          cn68xx;
	struct cvmx_rnm_serial_num_s          cn68xxp1;
	struct cvmx_rnm_serial_num_s          cnf71xx;
};
typedef union cvmx_rnm_serial_num cvmx_rnm_serial_num_t;

#endif

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