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cvmip.h
(5.88 KB)
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cvmx-abi.h
(3.67 KB)
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cvmx-access-native.h
(26.79 KB)
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cvmx-access.h
(7.82 KB)
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cvmx-address.h
(10.26 KB)
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cvmx-agl-defs.h
(213.66 KB)
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cvmx-app-hotplug.c
(27.64 KB)
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cvmx-app-hotplug.h
(5.77 KB)
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cvmx-app-init-linux.c
(14.29 KB)
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cvmx-app-init.c
(22.54 KB)
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cvmx-app-init.h
(19.32 KB)
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cvmx-asm.h
(39.3 KB)
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cvmx-asx0-defs.h
(5.19 KB)
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cvmx-asxx-defs.h
(50.57 KB)
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cvmx-atomic.h
(21.71 KB)
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cvmx-bootloader.h
(5.64 KB)
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cvmx-bootmem.c
(40.91 KB)
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cvmx-bootmem.h
(18.88 KB)
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cvmx-ciu-defs.h
(702.5 KB)
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cvmx-ciu2-defs.h
(487.31 KB)
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cvmx-clock.c
(4.48 KB)
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cvmx-clock.h
(4.43 KB)
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cvmx-cmd-queue.c
(11.84 KB)
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cvmx-cmd-queue.h
(22 KB)
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cvmx-cn3010-evb-hs5.c
(6.05 KB)
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cvmx-cn3010-evb-hs5.h
(2.3 KB)
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cvmx-compactflash.c
(12.8 KB)
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cvmx-compactflash.h
(3.05 KB)
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cvmx-core.c
(5.3 KB)
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cvmx-core.h
(9.46 KB)
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cvmx-coremask.c
(4.12 KB)
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cvmx-coremask.h
(8.11 KB)
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cvmx-crypto.c
(2.6 KB)
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cvmx-crypto.h
(2.54 KB)
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cvmx-csr-enums.h
(8.45 KB)
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cvmx-csr-typedefs.h
(3.92 KB)
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cvmx-csr.h
(11.46 KB)
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cvmx-dbg-defs.h
(6.28 KB)
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cvmx-debug-handler.S
(7.44 KB)
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cvmx-debug-remote.c
(3.24 KB)
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cvmx-debug-uart.c
(7.88 KB)
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cvmx-debug.c
(55.98 KB)
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cvmx-debug.h
(22.2 KB)
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cvmx-dfa-defs.h
(383.08 KB)
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cvmx-dfa.c
(3.7 KB)
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cvmx-dfa.h
(34.87 KB)
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cvmx-dfm-defs.h
(205.93 KB)
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cvmx-dma-engine.c
(20.25 KB)
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cvmx-dma-engine.h
(24.06 KB)
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cvmx-dpi-defs.h
(107.61 KB)
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cvmx-ebt3000.c
(3.82 KB)
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cvmx-ebt3000.h
(2.25 KB)
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cvmx-endor-defs.h
(311.42 KB)
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cvmx-eoi-defs.h
(26.27 KB)
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cvmx-fau.h
(20.31 KB)
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cvmx-flash.c
(22.46 KB)
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cvmx-flash.h
(3.8 KB)
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cvmx-fpa-defs.h
(157.78 KB)
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cvmx-fpa.c
(6.63 KB)
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cvmx-fpa.h
(10.39 KB)
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cvmx-gmx.h
(3.07 KB)
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cvmx-gmxx-defs.h
(505.27 KB)
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cvmx-gpio-defs.h
(36.89 KB)
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cvmx-gpio.h
(5.48 KB)
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cvmx-helper-board.c
(58 KB)
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cvmx-helper-board.h
(7.82 KB)
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cvmx-helper-cfg.c
(18.68 KB)
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cvmx-helper-cfg.h
(8.1 KB)
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cvmx-helper-check-defines.h
(4.1 KB)
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cvmx-helper-errata.c
(11.91 KB)
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cvmx-helper-errata.h
(3.24 KB)
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cvmx-helper-fpa.c
(8.81 KB)
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cvmx-helper-fpa.h
(3.21 KB)
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cvmx-helper-ilk.c
(12.74 KB)
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cvmx-helper-ilk.h
(3.58 KB)
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cvmx-helper-jtag.c
(7.05 KB)
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cvmx-helper-jtag.h
(3.91 KB)
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cvmx-helper-loop.c
(4.35 KB)
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cvmx-helper-loop.h
(2.78 KB)
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cvmx-helper-npi.c
(5.72 KB)
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cvmx-helper-npi.h
(2.82 KB)
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cvmx-helper-rgmii.c
(19.12 KB)
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cvmx-helper-rgmii.h
(4.5 KB)
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cvmx-helper-sgmii.c
(27.09 KB)
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cvmx-helper-sgmii.h
(4.3 KB)
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cvmx-helper-spi.c
(8.4 KB)
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cvmx-helper-spi.h
(3.68 KB)
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cvmx-helper-srio.c
(11.58 KB)
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cvmx-helper-srio.h
(3.6 KB)
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cvmx-helper-util.c
(25.77 KB)
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cvmx-helper-util.h
(9.88 KB)
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cvmx-helper-xaui.c
(16.54 KB)
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cvmx-helper-xaui.h
(4.29 KB)
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cvmx-helper.c
(69.71 KB)
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cvmx-helper.h
(12.7 KB)
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cvmx-hfa.c
(5.04 KB)
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cvmx-hfa.h
(10.3 KB)
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cvmx-higig.h
(23.21 KB)
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cvmx-ilk-defs.h
(170.31 KB)
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cvmx-ilk.c
(45.16 KB)
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cvmx-ilk.h
(5.89 KB)
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cvmx-interrupt-handler.S
(5.87 KB)
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cvmx-interrupt.c
(47.42 KB)
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cvmx-interrupt.h
(8.07 KB)
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cvmx-iob-defs.h
(89.11 KB)
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cvmx-iob1-defs.h
(6.8 KB)
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cvmx-ipd-defs.h
(186.51 KB)
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cvmx-ipd.c
(12.88 KB)
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cvmx-ipd.h
(6.3 KB)
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cvmx-ixf18201.c
(12.8 KB)
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cvmx-ixf18201.h
(3.54 KB)
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cvmx-key-defs.h
(11 KB)
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cvmx-key.h
(3.29 KB)
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cvmx-l2c-defs.h
(353.27 KB)
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cvmx-l2c.c
(52.95 KB)
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cvmx-l2c.h
(19.72 KB)
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cvmx-l2d-defs.h
(60.71 KB)
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cvmx-l2t-defs.h
(50.68 KB)
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cvmx-led-defs.h
(22.68 KB)
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cvmx-llm.c
(36.51 KB)
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cvmx-llm.h
(11.72 KB)
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cvmx-lmcx-defs.h
(532.21 KB)
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cvmx-log-arc.S
(5.67 KB)
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cvmx-log.c
(18.26 KB)
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cvmx-log.h
(4.95 KB)
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cvmx-malloc
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cvmx-malloc.h
(7.2 KB)
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cvmx-mdio.h
(15.99 KB)
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cvmx-mgmt-port.c
(36.2 KB)
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cvmx-mgmt-port.h
(7.23 KB)
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cvmx-mio-defs.h
(454.14 KB)
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cvmx-mixx-defs.h
(94.59 KB)
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cvmx-mpi-defs.h
(33.42 KB)
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cvmx-nand.c
(76.64 KB)
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cvmx-nand.h
(26.85 KB)
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cvmx-ndf-defs.h
(25.53 KB)
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cvmx-npei-defs.h
(378.19 KB)
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cvmx-npi-defs.h
(252.36 KB)
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cvmx-npi.h
(4.69 KB)
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cvmx-packet.h
(2.94 KB)
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cvmx-pci-defs.h
(250.53 KB)
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cvmx-pci.h
(2.37 KB)
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cvmx-pcie.c
(63 KB)
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cvmx-pcie.h
(10.08 KB)
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cvmx-pcieepx-defs.h
(304.49 KB)
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cvmx-pciercx-defs.h
(284.89 KB)
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cvmx-pcm-defs.h
(12.34 KB)
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cvmx-pcmx-defs.h
(46.12 KB)
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cvmx-pcsx-defs.h
(71.23 KB)
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cvmx-pcsxx-defs.h
(45.79 KB)
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cvmx-pemx-defs.h
(68.97 KB)
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cvmx-pescx-defs.h
(49.92 KB)
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cvmx-pexp-defs.h
(97.89 KB)
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cvmx-pip-defs.h
(315.91 KB)
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cvmx-pip.h
(33.65 KB)
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cvmx-pko-defs.h
(181.41 KB)
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cvmx-pko.c
(32 KB)
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cvmx-pko.h
(31.29 KB)
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cvmx-platform.h
(7.45 KB)
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cvmx-pow-defs.h
(93.02 KB)
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cvmx-pow.c
(32.26 KB)
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cvmx-pow.h
(100.93 KB)
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cvmx-power-throttle.c
(7.25 KB)
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cvmx-power-throttle.h
(3.85 KB)
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cvmx-profiler.c
(7.81 KB)
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cvmx-profiler.h
(3.15 KB)
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cvmx-qlm-tables.c
(35.37 KB)
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cvmx-qlm.c
(23.41 KB)
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cvmx-qlm.h
(4.76 KB)
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cvmx-rad-defs.h
(43.58 KB)
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cvmx-raid.c
(4.71 KB)
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cvmx-raid.h
(13.02 KB)
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cvmx-resources.config
(7.66 KB)
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cvmx-rng.h
(5.02 KB)
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cvmx-rnm-defs.h
(13.03 KB)
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cvmx-rtc.h
(4.21 KB)
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cvmx-rwlock.h
(5.25 KB)
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cvmx-scratch.h
(4.76 KB)
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cvmx-shared-linux-n32.ld
(11.8 KB)
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cvmx-shared-linux-o32.ld
(10.67 KB)
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cvmx-shared-linux.ld
(11.77 KB)
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cvmx-shmem.c
(18.89 KB)
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cvmx-shmem.h
(4.11 KB)
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cvmx-sim-magic.h
(5.59 KB)
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cvmx-sli-defs.h
(312.94 KB)
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cvmx-smi-defs.h
(4.09 KB)
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cvmx-smix-defs.h
(21.71 KB)
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cvmx-spi.c
(24.99 KB)
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cvmx-spi.h
(10.22 KB)
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cvmx-spi4000.c
(19.23 KB)
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cvmx-spinlock.h
(11.73 KB)
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cvmx-spx0-defs.h
(3.94 KB)
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cvmx-spxx-defs.h
(62.44 KB)
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cvmx-srio.c
(63.05 KB)
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cvmx-srio.h
(26.68 KB)
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cvmx-sriomaintx-defs.h
(222.52 KB)
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cvmx-sriox-defs.h
(211.56 KB)
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cvmx-srxx-defs.h
(14.41 KB)
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cvmx-sso-defs.h
(87.33 KB)
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cvmx-stxx-defs.h
(34.02 KB)
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cvmx-swap.h
(4.11 KB)
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cvmx-sysinfo.c
(8.78 KB)
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cvmx-sysinfo.h
(6.45 KB)
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cvmx-thunder.c
(9.22 KB)
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cvmx-thunder.h
(4.54 KB)
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cvmx-tim-defs.h
(58.36 KB)
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cvmx-tim.c
(10.92 KB)
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cvmx-tim.h
(12.1 KB)
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cvmx-tlb.c
(10.12 KB)
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cvmx-tlb.h
(5.07 KB)
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cvmx-tra-defs.h
(4.59 KB)
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cvmx-tra.c
(31.16 KB)
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cvmx-tra.h
(34.28 KB)
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cvmx-trax-defs.h
(197.09 KB)
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cvmx-twsi.c
(16.25 KB)
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cvmx-twsi.h
(10.22 KB)
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cvmx-uahcx-defs.h
(181.38 KB)
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cvmx-uart.c
(5.69 KB)
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cvmx-uart.h
(4.58 KB)
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cvmx-uctlx-defs.h
(50.26 KB)
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cvmx-usb.c
(138.53 KB)
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cvmx-usb.h
(46.67 KB)
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cvmx-usbcx-defs.h
(259.23 KB)
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cvmx-usbd.c
(36.09 KB)
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cvmx-usbd.h
(9.82 KB)
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cvmx-usbnx-defs.h
(136.12 KB)
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cvmx-utils.h
(7.54 KB)
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cvmx-version.h
(2.23 KB)
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cvmx-warn.c
(2.75 KB)
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cvmx-warn.h
(2.43 KB)
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cvmx-wqe.h
(38.61 KB)
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cvmx-zip-defs.h
(43.18 KB)
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cvmx-zip.c
(7.37 KB)
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cvmx-zip.h
(8.5 KB)
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cvmx-zone.c
(4.7 KB)
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cvmx.h
(3.5 KB)
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octeon-boot-info.h
(8.08 KB)
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octeon-feature.c
(4.71 KB)
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octeon-feature.h
(11.94 KB)
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octeon-model.c
(15.79 KB)
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octeon-model.h
(16.53 KB)
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octeon-pci-console.c
(19.73 KB)
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octeon-pci-console.h
(5.18 KB)
Editing: cvmx-twsi.c
/***********************license start*************** * Copyright (c) 2003-2010 Cavium Inc. (support@cavium.com). All rights * reserved. * * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are * met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials provided * with the distribution. * * Neither the name of Cavium Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. * This Software, including technical data, may be subject to U.S. export control * laws, including the U.S. Export Administration Act and its associated * regulations, and may be subject to export or import regulations in other * countries. * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. ***********************license end**************************************/ /** * @file * * Interface to the TWSI / I2C bus * * <hr>$Revision: 70030 $<hr> * */ #ifdef CVMX_BUILD_FOR_LINUX_KERNEL #include <linux/i2c.h> #include <asm/octeon/cvmx.h> #include <asm/octeon/cvmx-twsi.h> #else #include "cvmx.h" #include "cvmx-twsi.h" #if !defined(CVMX_BUILD_FOR_FREEBSD_KERNEL) #include "cvmx-csr-db.h" #endif #endif //#define PRINT_TWSI_CONFIG #ifdef PRINT_TWSI_CONFIG #define twsi_printf printf #else #define twsi_printf(...) #define cvmx_csr_db_decode(...) #endif #ifdef CVMX_BUILD_FOR_LINUX_KERNEL # if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) static struct i2c_adapter *__cvmx_twsix_get_adapter(int twsi_id) { struct octeon_i2c { wait_queue_head_t queue; struct i2c_adapter adap; int irq; int twsi_freq; int sys_freq; resource_size_t twsi_phys; void __iomem *twsi_base; resource_size_t regsize; device_t dev; int broken_irq_mode; }; struct i2c_adapter *adapter; struct octeon_i2c *i2c; adapter = i2c_get_adapter(0); if (adapter == NULL) return NULL; i2c = container_of(adapter, struct octeon_i2c, adap); return &i2c[twsi_id].adap; } #endif #endif /** * Do a twsi read from a 7 bit device address using an (optional) internal address. * Up to 8 bytes can be read at a time. * * @param twsi_id which Octeon TWSI bus to use * @param dev_addr Device address (7 bit) * @param internal_addr * Internal address. Can be 0, 1 or 2 bytes in width * @param num_bytes Number of data bytes to read * @param ia_width_bytes * Internal address size in bytes (0, 1, or 2) * @param data Pointer argument where the read data is returned. * * @return read data returned in 'data' argument * Number of bytes read on success * -1 on failure */ int cvmx_twsix_read_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t *data) { #ifdef CVMX_BUILD_FOR_LINUX_KERNEL # if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) struct i2c_adapter *adapter; u8 data_buf[8]; u8 addr_buf[8]; struct i2c_msg msg[2]; uint64_t r; int i, j; if (ia_width_bytes == 0) return cvmx_twsix_read(twsi_id, dev_addr, num_bytes, data); BUG_ON(ia_width_bytes > 2); BUG_ON(num_bytes > 8 || num_bytes < 1); adapter = __cvmx_twsix_get_adapter(twsi_id); if (adapter == NULL) return -1; for (j = 0, i = ia_width_bytes - 1; i >= 0; i--, j++) addr_buf[j] = (u8)(internal_addr >> (i * 8)); msg[0].addr = dev_addr; msg[0].flags = 0; msg[0].len = ia_width_bytes; msg[0].buf = addr_buf; msg[1].addr = dev_addr; msg[1].flags = I2C_M_RD; msg[1].len = num_bytes; msg[1].buf = data_buf; i = i2c_transfer(adapter, msg, 2); i2c_put_adapter(adapter); if (i == 2) { r = 0; for (i = 0; i < num_bytes; i++) r = (r << 8) | data_buf[i]; *data = r; return num_bytes; } else { return -1; } # else BUG(); /* The I2C driver is not compiled in */ # endif #else cvmx_mio_twsx_sw_twsi_t sw_twsi_val; cvmx_mio_twsx_sw_twsi_ext_t twsi_ext; int retry_limit = 5; if (num_bytes < 1 || num_bytes > 8 || !data || ia_width_bytes < 0 || ia_width_bytes > 2) return -1; retry: twsi_ext.u64 = 0; sw_twsi_val.u64 = 0; sw_twsi_val.s.v = 1; sw_twsi_val.s.r = 1; sw_twsi_val.s.sovr = 1; sw_twsi_val.s.size = num_bytes - 1; sw_twsi_val.s.a = dev_addr; if (ia_width_bytes > 0) { sw_twsi_val.s.op = 1; sw_twsi_val.s.ia = (internal_addr >> 3) & 0x1f; sw_twsi_val.s.eop_ia = internal_addr & 0x7; } if (ia_width_bytes == 2) { sw_twsi_val.s.eia = 1; twsi_ext.s.ia = internal_addr >> 8; cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id), twsi_ext.u64); } cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); while (((cvmx_mio_twsx_sw_twsi_t)(sw_twsi_val.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id)))).s.v) cvmx_wait(1000); twsi_printf("Results:\n"); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); if (!sw_twsi_val.s.r) { /* Check the reason for the failure. We may need to retry to handle multi-master ** configurations. ** Lost arbitration : 0x38, 0x68, 0xB0, 0x78 ** Core busy as slave: 0x80, 0x88, 0xA0, 0xA8, 0xB8, 0xC0, 0xC8 */ if (sw_twsi_val.s.d == 0x38 || sw_twsi_val.s.d == 0x68 || sw_twsi_val.s.d == 0xB0 || sw_twsi_val.s.d == 0x78 || sw_twsi_val.s.d == 0x80 || sw_twsi_val.s.d == 0x88 || sw_twsi_val.s.d == 0xA0 || sw_twsi_val.s.d == 0xA8 || sw_twsi_val.s.d == 0xB8 || sw_twsi_val.s.d == 0xC8) { if (retry_limit-- > 0) { cvmx_wait_usec(100); goto retry; } } /* For all other errors, return an error code */ return -1; } *data = (sw_twsi_val.s.d & (0xFFFFFFFF >> (32 - num_bytes*8))); if (num_bytes > 4) { twsi_ext.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id)); *data |= ((unsigned long long)(twsi_ext.s.d & (0xFFFFFFFF >> (32 - num_bytes*8))) << 32); } return num_bytes; #endif } /** * Read from a TWSI device (7 bit device address only) without generating any * internal addresses. * Read from 1-8 bytes and returns them in the data pointer. * * @param twsi_id TWSI interface on Octeon to use * @param dev_addr TWSI device address (7 bit only) * @param num_bytes number of bytes to read * @param data Pointer to data read from TWSI device * * @return Number of bytes read on success * -1 on error */ int cvmx_twsix_read(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t *data) { #ifdef CVMX_BUILD_FOR_LINUX_KERNEL # if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) struct i2c_adapter *adapter; u8 data_buf[8]; struct i2c_msg msg[1]; uint64_t r; int i; BUG_ON(num_bytes > 8 || num_bytes < 1); adapter = __cvmx_twsix_get_adapter(twsi_id); if (adapter == NULL) return -1; msg[0].addr = dev_addr; msg[0].flags = I2C_M_RD; msg[0].len = num_bytes; msg[0].buf = data_buf; i = i2c_transfer(adapter, msg, 1); i2c_put_adapter(adapter); if (i == 1) { r = 0; for (i = 0; i < num_bytes; i++) r = (r << 8) | data_buf[i]; *data = r; return num_bytes; } else { return -1; } # else BUG(); /* The I2C driver is not compiled in */ # endif #else cvmx_mio_twsx_sw_twsi_t sw_twsi_val; cvmx_mio_twsx_sw_twsi_ext_t twsi_ext; int retry_limit = 5; if (num_bytes > 8 || num_bytes < 1) return -1; retry: sw_twsi_val.u64 = 0; sw_twsi_val.s.v = 1; sw_twsi_val.s.r = 1; sw_twsi_val.s.a = dev_addr; sw_twsi_val.s.sovr = 1; sw_twsi_val.s.size = num_bytes - 1; cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); while (((cvmx_mio_twsx_sw_twsi_t)(sw_twsi_val.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id)))).s.v) cvmx_wait(1000); twsi_printf("Results:\n"); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); if (!sw_twsi_val.s.r) if (!sw_twsi_val.s.r) { /* Check the reason for the failure. We may need to retry to handle multi-master ** configurations. ** Lost arbitration : 0x38, 0x68, 0xB0, 0x78 ** Core busy as slave: 0x80, 0x88, 0xA0, 0xA8, 0xB8, 0xC0, 0xC8 */ if (sw_twsi_val.s.d == 0x38 || sw_twsi_val.s.d == 0x68 || sw_twsi_val.s.d == 0xB0 || sw_twsi_val.s.d == 0x78 || sw_twsi_val.s.d == 0x80 || sw_twsi_val.s.d == 0x88 || sw_twsi_val.s.d == 0xA0 || sw_twsi_val.s.d == 0xA8 || sw_twsi_val.s.d == 0xB8 || sw_twsi_val.s.d == 0xC8) { if (retry_limit-- > 0) { cvmx_wait_usec(100); goto retry; } } /* For all other errors, return an error code */ return -1; } *data = (sw_twsi_val.s.d & (0xFFFFFFFF >> (32 - num_bytes*8))); if (num_bytes > 4) { twsi_ext.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id)); *data |= ((unsigned long long)(twsi_ext.s.d & (0xFFFFFFFF >> (32 - num_bytes*8))) << 32); } return num_bytes; #endif } /** * Perform a twsi write operation to a 7 bit device address. * * Note that many eeprom devices have page restrictions regarding address boundaries * that can be crossed in one write operation. This is device dependent, and this routine * does nothing in this regard. * This command does not generate any internal addressess. * * @param twsi_id Octeon TWSI interface to use * @param dev_addr TWSI device address * @param num_bytes Number of bytes to write (between 1 and 8 inclusive) * @param data Data to write * * @return 0 on success * -1 on failure */ int cvmx_twsix_write(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t data) { #ifdef CVMX_BUILD_FOR_LINUX_KERNEL # if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) struct i2c_adapter *adapter; u8 data_buf[8]; struct i2c_msg msg[1]; int i, j; BUG_ON(num_bytes > 8 || num_bytes < 1); adapter = __cvmx_twsix_get_adapter(twsi_id); if (adapter == NULL) return -1; for (j = 0, i = num_bytes - 1; i >= 0; i--, j++) data_buf[j] = (u8)(data >> (i * 8)); msg[0].addr = dev_addr; msg[0].flags = 0; msg[0].len = num_bytes; msg[0].buf = data_buf; i = i2c_transfer(adapter, msg, 1); i2c_put_adapter(adapter); if (i == 1) return num_bytes; else return -1; # else BUG(); /* The I2C driver is not compiled in */ # endif #else cvmx_mio_twsx_sw_twsi_t sw_twsi_val; if (num_bytes > 8 || num_bytes < 1) return -1; sw_twsi_val.u64 = 0; sw_twsi_val.s.v = 1; sw_twsi_val.s.a = dev_addr; sw_twsi_val.s.d = data & 0xffffffff; sw_twsi_val.s.sovr = 1; sw_twsi_val.s.size = num_bytes - 1; if (num_bytes > 4) { /* Upper four bytes go into a separate register */ cvmx_mio_twsx_sw_twsi_ext_t twsi_ext; twsi_ext.u64 = 0; twsi_ext.s.d = data >> 32; cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id), twsi_ext.u64); } cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); while (((cvmx_mio_twsx_sw_twsi_t)(sw_twsi_val.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id)))).s.v) ; twsi_printf("Results:\n"); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); if (!sw_twsi_val.s.r) return -1; return 0; #endif } /** * Write 1-8 bytes to a TWSI device using an internal address. * * @param twsi_id which TWSI interface on Octeon to use * @param dev_addr TWSI device address (7 bit only) * @param internal_addr * TWSI internal address (0, 8, or 16 bits) * @param num_bytes Number of bytes to write (1-8) * @param ia_width_bytes * internal address width, in bytes (0, 1, 2) * @param data Data to write. Data is written MSB first on the twsi bus, and only the lower * num_bytes bytes of the argument are valid. (If a 2 byte write is done, only * the low 2 bytes of the argument is used. * * @return Number of bytes read on success, * -1 on error */ int cvmx_twsix_write_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t data) { #ifdef CVMX_BUILD_FOR_LINUX_KERNEL # if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) struct i2c_adapter *adapter; u8 data_buf[8]; u8 addr_buf[8]; struct i2c_msg msg[2]; int i, j; if (ia_width_bytes == 0) return cvmx_twsix_write(twsi_id, dev_addr, num_bytes, data); BUG_ON(ia_width_bytes > 2); BUG_ON(num_bytes > 8 || num_bytes < 1); adapter = __cvmx_twsix_get_adapter(twsi_id); if (adapter == NULL) return -1; for (j = 0, i = ia_width_bytes - 1; i >= 0; i--, j++) addr_buf[j] = (u8)(internal_addr >> (i * 8)); for (j = 0, i = num_bytes - 1; i >= 0; i--, j++) data_buf[j] = (u8)(data >> (i * 8)); msg[0].addr = dev_addr; msg[0].flags = 0; msg[0].len = ia_width_bytes; msg[0].buf = addr_buf; msg[1].addr = dev_addr; msg[1].flags = 0; msg[1].len = num_bytes; msg[1].buf = data_buf; i = i2c_transfer(adapter, msg, 2); i2c_put_adapter(adapter); if (i == 2) { /* Poll until reads succeed, or polling times out */ int to = 100; while (to-- > 0) { uint64_t data; if (cvmx_twsix_read(twsi_id, dev_addr, 1, &data) >= 0) break; } } if (i == 2) return num_bytes; else return -1; # else BUG(); /* The I2C driver is not compiled in */ # endif #else cvmx_mio_twsx_sw_twsi_t sw_twsi_val; cvmx_mio_twsx_sw_twsi_ext_t twsi_ext; int to; if (num_bytes < 1 || num_bytes > 8 || ia_width_bytes < 0 || ia_width_bytes > 2) return -1; twsi_ext.u64 = 0; sw_twsi_val.u64 = 0; sw_twsi_val.s.v = 1; sw_twsi_val.s.sovr = 1; sw_twsi_val.s.size = num_bytes - 1; sw_twsi_val.s.a = dev_addr; sw_twsi_val.s.d = 0xFFFFFFFF & data; if (ia_width_bytes > 0) { sw_twsi_val.s.op = 1; sw_twsi_val.s.ia = (internal_addr >> 3) & 0x1f; sw_twsi_val.s.eop_ia = internal_addr & 0x7; } if (ia_width_bytes == 2) { sw_twsi_val.s.eia = 1; twsi_ext.s.ia = internal_addr >> 8; } if (num_bytes > 4) twsi_ext.s.d = data >> 32; twsi_printf("%s: twsi_id=%x, dev_addr=%x, internal_addr=%x\n\tnum_bytes=%d, ia_width_bytes=%d, data=%lx\n", __FUNCTION__, twsi_id, dev_addr, internal_addr, num_bytes, ia_width_bytes, data); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id), twsi_ext.u64); cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI_EXT(twsi_id), twsi_ext.u64); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); cvmx_write_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); while (((cvmx_mio_twsx_sw_twsi_t)(sw_twsi_val.u64 = cvmx_read_csr(CVMX_MIO_TWSX_SW_TWSI(twsi_id)))).s.v) ; twsi_printf("Results:\n"); cvmx_csr_db_decode(cvmx_get_proc_id(), CVMX_MIO_TWSX_SW_TWSI(twsi_id), sw_twsi_val.u64); /* Poll until reads succeed, or polling times out */ to = 100; while (to-- > 0) { uint64_t data; if (cvmx_twsix_read(twsi_id, dev_addr, 1, &data) >= 0) break; } if (to <= 0) return -1; return num_bytes; #endif }
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