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📁 ..
📄 cvmip.h(5.88 KB)
📄 cvmx-abi.h(3.67 KB)
📄 cvmx-access-native.h(26.79 KB)
📄 cvmx-access.h(7.82 KB)
📄 cvmx-address.h(10.26 KB)
📄 cvmx-agl-defs.h(213.66 KB)
📄 cvmx-app-hotplug.c(27.64 KB)
📄 cvmx-app-hotplug.h(5.77 KB)
📄 cvmx-app-init-linux.c(14.29 KB)
📄 cvmx-app-init.c(22.54 KB)
📄 cvmx-app-init.h(19.32 KB)
📄 cvmx-asm.h(39.3 KB)
📄 cvmx-asx0-defs.h(5.19 KB)
📄 cvmx-asxx-defs.h(50.57 KB)
📄 cvmx-atomic.h(21.71 KB)
📄 cvmx-bootloader.h(5.64 KB)
📄 cvmx-bootmem.c(40.91 KB)
📄 cvmx-bootmem.h(18.88 KB)
📄 cvmx-ciu-defs.h(702.5 KB)
📄 cvmx-ciu2-defs.h(487.31 KB)
📄 cvmx-clock.c(4.48 KB)
📄 cvmx-clock.h(4.43 KB)
📄 cvmx-cmd-queue.c(11.84 KB)
📄 cvmx-cmd-queue.h(22 KB)
📄 cvmx-cn3010-evb-hs5.c(6.05 KB)
📄 cvmx-cn3010-evb-hs5.h(2.3 KB)
📄 cvmx-compactflash.c(12.8 KB)
📄 cvmx-compactflash.h(3.05 KB)
📄 cvmx-core.c(5.3 KB)
📄 cvmx-core.h(9.46 KB)
📄 cvmx-coremask.c(4.12 KB)
📄 cvmx-coremask.h(8.11 KB)
📄 cvmx-crypto.c(2.6 KB)
📄 cvmx-crypto.h(2.54 KB)
📄 cvmx-csr-enums.h(8.45 KB)
📄 cvmx-csr-typedefs.h(3.92 KB)
📄 cvmx-csr.h(11.46 KB)
📄 cvmx-dbg-defs.h(6.28 KB)
📄 cvmx-debug-handler.S(7.44 KB)
📄 cvmx-debug-remote.c(3.24 KB)
📄 cvmx-debug-uart.c(7.88 KB)
📄 cvmx-debug.c(55.98 KB)
📄 cvmx-debug.h(22.2 KB)
📄 cvmx-dfa-defs.h(383.08 KB)
📄 cvmx-dfa.c(3.7 KB)
📄 cvmx-dfa.h(34.87 KB)
📄 cvmx-dfm-defs.h(205.93 KB)
📄 cvmx-dma-engine.c(20.25 KB)
📄 cvmx-dma-engine.h(24.06 KB)
📄 cvmx-dpi-defs.h(107.61 KB)
📄 cvmx-ebt3000.c(3.82 KB)
📄 cvmx-ebt3000.h(2.25 KB)
📄 cvmx-endor-defs.h(311.42 KB)
📄 cvmx-eoi-defs.h(26.27 KB)
📄 cvmx-fau.h(20.31 KB)
📄 cvmx-flash.c(22.46 KB)
📄 cvmx-flash.h(3.8 KB)
📄 cvmx-fpa-defs.h(157.78 KB)
📄 cvmx-fpa.c(6.63 KB)
📄 cvmx-fpa.h(10.39 KB)
📄 cvmx-gmx.h(3.07 KB)
📄 cvmx-gmxx-defs.h(505.27 KB)
📄 cvmx-gpio-defs.h(36.89 KB)
📄 cvmx-gpio.h(5.48 KB)
📄 cvmx-helper-board.c(58 KB)
📄 cvmx-helper-board.h(7.82 KB)
📄 cvmx-helper-cfg.c(18.68 KB)
📄 cvmx-helper-cfg.h(8.1 KB)
📄 cvmx-helper-check-defines.h(4.1 KB)
📄 cvmx-helper-errata.c(11.91 KB)
📄 cvmx-helper-errata.h(3.24 KB)
📄 cvmx-helper-fpa.c(8.81 KB)
📄 cvmx-helper-fpa.h(3.21 KB)
📄 cvmx-helper-ilk.c(12.74 KB)
📄 cvmx-helper-ilk.h(3.58 KB)
📄 cvmx-helper-jtag.c(7.05 KB)
📄 cvmx-helper-jtag.h(3.91 KB)
📄 cvmx-helper-loop.c(4.35 KB)
📄 cvmx-helper-loop.h(2.78 KB)
📄 cvmx-helper-npi.c(5.72 KB)
📄 cvmx-helper-npi.h(2.82 KB)
📄 cvmx-helper-rgmii.c(19.12 KB)
📄 cvmx-helper-rgmii.h(4.5 KB)
📄 cvmx-helper-sgmii.c(27.09 KB)
📄 cvmx-helper-sgmii.h(4.3 KB)
📄 cvmx-helper-spi.c(8.4 KB)
📄 cvmx-helper-spi.h(3.68 KB)
📄 cvmx-helper-srio.c(11.58 KB)
📄 cvmx-helper-srio.h(3.6 KB)
📄 cvmx-helper-util.c(25.77 KB)
📄 cvmx-helper-util.h(9.88 KB)
📄 cvmx-helper-xaui.c(16.54 KB)
📄 cvmx-helper-xaui.h(4.29 KB)
📄 cvmx-helper.c(69.71 KB)
📄 cvmx-helper.h(12.7 KB)
📄 cvmx-hfa.c(5.04 KB)
📄 cvmx-hfa.h(10.3 KB)
📄 cvmx-higig.h(23.21 KB)
📄 cvmx-ilk-defs.h(170.31 KB)
📄 cvmx-ilk.c(45.16 KB)
📄 cvmx-ilk.h(5.89 KB)
📄 cvmx-interrupt-handler.S(5.87 KB)
📄 cvmx-interrupt.c(47.42 KB)
📄 cvmx-interrupt.h(8.07 KB)
📄 cvmx-iob-defs.h(89.11 KB)
📄 cvmx-iob1-defs.h(6.8 KB)
📄 cvmx-ipd-defs.h(186.51 KB)
📄 cvmx-ipd.c(12.88 KB)
📄 cvmx-ipd.h(6.3 KB)
📄 cvmx-ixf18201.c(12.8 KB)
📄 cvmx-ixf18201.h(3.54 KB)
📄 cvmx-key-defs.h(11 KB)
📄 cvmx-key.h(3.29 KB)
📄 cvmx-l2c-defs.h(353.27 KB)
📄 cvmx-l2c.c(52.95 KB)
📄 cvmx-l2c.h(19.72 KB)
📄 cvmx-l2d-defs.h(60.71 KB)
📄 cvmx-l2t-defs.h(50.68 KB)
📄 cvmx-led-defs.h(22.68 KB)
📄 cvmx-llm.c(36.51 KB)
📄 cvmx-llm.h(11.72 KB)
📄 cvmx-lmcx-defs.h(532.21 KB)
📄 cvmx-log-arc.S(5.67 KB)
📄 cvmx-log.c(18.26 KB)
📄 cvmx-log.h(4.95 KB)
📁 cvmx-malloc
📄 cvmx-malloc.h(7.2 KB)
📄 cvmx-mdio.h(15.99 KB)
📄 cvmx-mgmt-port.c(36.2 KB)
📄 cvmx-mgmt-port.h(7.23 KB)
📄 cvmx-mio-defs.h(454.14 KB)
📄 cvmx-mixx-defs.h(94.59 KB)
📄 cvmx-mpi-defs.h(33.42 KB)
📄 cvmx-nand.c(76.64 KB)
📄 cvmx-nand.h(26.85 KB)
📄 cvmx-ndf-defs.h(25.53 KB)
📄 cvmx-npei-defs.h(378.19 KB)
📄 cvmx-npi-defs.h(252.36 KB)
📄 cvmx-npi.h(4.69 KB)
📄 cvmx-packet.h(2.94 KB)
📄 cvmx-pci-defs.h(250.53 KB)
📄 cvmx-pci.h(2.37 KB)
📄 cvmx-pcie.c(63 KB)
📄 cvmx-pcie.h(10.08 KB)
📄 cvmx-pcieepx-defs.h(304.49 KB)
📄 cvmx-pciercx-defs.h(284.89 KB)
📄 cvmx-pcm-defs.h(12.34 KB)
📄 cvmx-pcmx-defs.h(46.12 KB)
📄 cvmx-pcsx-defs.h(71.23 KB)
📄 cvmx-pcsxx-defs.h(45.79 KB)
📄 cvmx-pemx-defs.h(68.97 KB)
📄 cvmx-pescx-defs.h(49.92 KB)
📄 cvmx-pexp-defs.h(97.89 KB)
📄 cvmx-pip-defs.h(315.91 KB)
📄 cvmx-pip.h(33.65 KB)
📄 cvmx-pko-defs.h(181.41 KB)
📄 cvmx-pko.c(32 KB)
📄 cvmx-pko.h(31.29 KB)
📄 cvmx-platform.h(7.45 KB)
📄 cvmx-pow-defs.h(93.02 KB)
📄 cvmx-pow.c(32.26 KB)
📄 cvmx-pow.h(100.93 KB)
📄 cvmx-power-throttle.c(7.25 KB)
📄 cvmx-power-throttle.h(3.85 KB)
📄 cvmx-profiler.c(7.81 KB)
📄 cvmx-profiler.h(3.15 KB)
📄 cvmx-qlm-tables.c(35.37 KB)
📄 cvmx-qlm.c(23.41 KB)
📄 cvmx-qlm.h(4.76 KB)
📄 cvmx-rad-defs.h(43.58 KB)
📄 cvmx-raid.c(4.71 KB)
📄 cvmx-raid.h(13.02 KB)
📄 cvmx-resources.config(7.66 KB)
📄 cvmx-rng.h(5.02 KB)
📄 cvmx-rnm-defs.h(13.03 KB)
📄 cvmx-rtc.h(4.21 KB)
📄 cvmx-rwlock.h(5.25 KB)
📄 cvmx-scratch.h(4.76 KB)
📄 cvmx-shared-linux-n32.ld(11.8 KB)
📄 cvmx-shared-linux-o32.ld(10.67 KB)
📄 cvmx-shared-linux.ld(11.77 KB)
📄 cvmx-shmem.c(18.89 KB)
📄 cvmx-shmem.h(4.11 KB)
📄 cvmx-sim-magic.h(5.59 KB)
📄 cvmx-sli-defs.h(312.94 KB)
📄 cvmx-smi-defs.h(4.09 KB)
📄 cvmx-smix-defs.h(21.71 KB)
📄 cvmx-spi.c(24.99 KB)
📄 cvmx-spi.h(10.22 KB)
📄 cvmx-spi4000.c(19.23 KB)
📄 cvmx-spinlock.h(11.73 KB)
📄 cvmx-spx0-defs.h(3.94 KB)
📄 cvmx-spxx-defs.h(62.44 KB)
📄 cvmx-srio.c(63.05 KB)
📄 cvmx-srio.h(26.68 KB)
📄 cvmx-sriomaintx-defs.h(222.52 KB)
📄 cvmx-sriox-defs.h(211.56 KB)
📄 cvmx-srxx-defs.h(14.41 KB)
📄 cvmx-sso-defs.h(87.33 KB)
📄 cvmx-stxx-defs.h(34.02 KB)
📄 cvmx-swap.h(4.11 KB)
📄 cvmx-sysinfo.c(8.78 KB)
📄 cvmx-sysinfo.h(6.45 KB)
📄 cvmx-thunder.c(9.22 KB)
📄 cvmx-thunder.h(4.54 KB)
📄 cvmx-tim-defs.h(58.36 KB)
📄 cvmx-tim.c(10.92 KB)
📄 cvmx-tim.h(12.1 KB)
📄 cvmx-tlb.c(10.12 KB)
📄 cvmx-tlb.h(5.07 KB)
📄 cvmx-tra-defs.h(4.59 KB)
📄 cvmx-tra.c(31.16 KB)
📄 cvmx-tra.h(34.28 KB)
📄 cvmx-trax-defs.h(197.09 KB)
📄 cvmx-twsi.c(16.25 KB)
📄 cvmx-twsi.h(10.22 KB)
📄 cvmx-uahcx-defs.h(181.38 KB)
📄 cvmx-uart.c(5.69 KB)
📄 cvmx-uart.h(4.58 KB)
📄 cvmx-uctlx-defs.h(50.26 KB)
📄 cvmx-usb.c(138.53 KB)
📄 cvmx-usb.h(46.67 KB)
📄 cvmx-usbcx-defs.h(259.23 KB)
📄 cvmx-usbd.c(36.09 KB)
📄 cvmx-usbd.h(9.82 KB)
📄 cvmx-usbnx-defs.h(136.12 KB)
📄 cvmx-utils.h(7.54 KB)
📄 cvmx-version.h(2.23 KB)
📄 cvmx-warn.c(2.75 KB)
📄 cvmx-warn.h(2.43 KB)
📄 cvmx-wqe.h(38.61 KB)
📄 cvmx-zip-defs.h(43.18 KB)
📄 cvmx-zip.c(7.37 KB)
📄 cvmx-zip.h(8.5 KB)
📄 cvmx-zone.c(4.7 KB)
📄 cvmx.h(3.5 KB)
📄 octeon-boot-info.h(8.08 KB)
📄 octeon-feature.c(4.71 KB)
📄 octeon-feature.h(11.94 KB)
📄 octeon-model.c(15.79 KB)
📄 octeon-model.h(16.53 KB)
📄 octeon-pci-console.c(19.73 KB)
📄 octeon-pci-console.h(5.18 KB)

Editing: cvmx-wqe.h

/***********************license start***************
 * Copyright (c) 2003-2010  Cavium Inc. (support@cavium.com). All rights
 * reserved.
 *
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met:
 *
 *   * Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *
 *   * Redistributions in binary form must reproduce the above
 *     copyright notice, this list of conditions and the following
 *     disclaimer in the documentation and/or other materials provided
 *     with the distribution.

*   * Neither the name of Cavium Inc. nor the names of
 *     its contributors may be used to endorse or promote products
 *     derived from this software without specific prior written
 *     permission.

* This Software, including technical data, may be subject to U.S. export  control
 * laws, including the U.S. Export Administration Act and its  associated
 * regulations, and may be subject to export or import  regulations in other
 * countries.

* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
 * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR
 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE  RISK ARISING OUT OF USE OR
 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
 ***********************license end**************************************/

/**
 * @file
 *
 * This header file defines the work queue entry (wqe) data structure.
 * Since this is a commonly used structure that depends on structures
 * from several hardware blocks, those definitions have been placed
 * in this file to create a single point of definition of the wqe
 * format.
 * Data structures are still named according to the block that they
 * relate to.
 *
 * This file must not depend on any other header files, except for cvmx.h!!!
 *
 *
 * <hr>$Revision: 70030 $<hr>
 *
 *
 */

#ifndef __CVMX_WQE_H__
#define __CVMX_WQE_H__

#ifdef	__cplusplus
extern "C" {
#endif

#define OCT_TAG_TYPE_STRING(x) (((x) == CVMX_POW_TAG_TYPE_ORDERED) ?  "ORDERED" : \
                                (((x) == CVMX_POW_TAG_TYPE_ATOMIC) ?  "ATOMIC" : \
                                (((x) == CVMX_POW_TAG_TYPE_NULL) ?  "NULL" : \
                                "NULL_NULL")))

/**
 * HW decode / err_code in work queue entry
 */
typedef union
{
    uint64_t                 u64;

/** Use this struct if the hardware determines that the packet is IP */
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               ip_offset     : 8; /**< HW sets to the number of L2 bytes prior to the IP */
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */
	    uint64_t varies:12; /**< 38xx and 68xx have different definitions.  */
        uint64_t               dec_ipcomp    : 1; /**< the packet needs to be decompressed */
        uint64_t               tcp_or_udp    : 1; /**< the packet is either TCP or UDP */
        uint64_t               dec_ipsec     : 1; /**< the packet needs to be decrypted (ESP or AH) */
        uint64_t               is_v6         : 1; /**< the packet is IPv6 */

/* (rcv_error, not_IP, IP_exc, is_frag, L4_error, software, etc.) */

uint64_t               software      : 1; /**< reserved for software use, hardware will clear on packet creation */
      /* exceptional conditions below */
        uint64_t               L4_error      : 1; /**< the receive interface hardware detected an L4 error (only applies if !is_frag)
                                                    (only applies if !rcv_error && !not_IP && !IP_exc && !is_frag)
                                                    failure indicated in err_code below, decode:
                                                    - 1 = Malformed L4
                                                    - 2 = L4 Checksum Error: the L4 checksum value is
                                                    - 3 = UDP Length Error: The UDP length field would make the UDP data longer than what
                                                        remains in the IP packet (as defined by the IP header length field).
                                                    - 4 = Bad L4 Port: either the source or destination TCP/UDP port is 0.
                                                    - 8 = TCP FIN Only: the packet is TCP and only the FIN flag set.
                                                    - 9 = TCP No Flags: the packet is TCP and no flags are set.
                                                    - 10 = TCP FIN RST: the packet is TCP and both FIN and RST are set.
                                                    - 11 = TCP SYN URG: the packet is TCP and both SYN and URG are set.
                                                    - 12 = TCP SYN RST: the packet is TCP and both SYN and RST are set.
                                                    - 13 = TCP SYN FIN: the packet is TCP and both SYN and FIN are set. */

uint64_t               is_frag       : 1; /**< set if the packet is a fragment */
        uint64_t               IP_exc        : 1; /**< the receive interface hardware detected an IP error / exception
                                                    (only applies if !rcv_error && !not_IP) failure indicated in err_code below, decode:
                                                    - 1 = Not IP: the IP version field is neither 4 nor 6.
                                                    - 2 = IPv4 Header Checksum Error: the IPv4 header has a checksum violation.
                                                    - 3 = IP Malformed Header: the packet is not long enough to contain the IP header.
                                                    - 4 = IP Malformed: the packet is not long enough to contain the bytes indicated by the IP
                                                        header. Pad is allowed.
                                                    - 5 = IP TTL Hop: the IPv4 TTL field or the IPv6 Hop Count field are zero.
                                                    - 6 = IP Options */

uint64_t               is_bcast      : 1; /**< set if the hardware determined that the packet is a broadcast */
        uint64_t               is_mcast      : 1; /**< set if the hardware determined that the packet is a multi-cast */
        uint64_t               not_IP        : 1; /**< set if the packet may not be IP (must be zero in this case) */
        uint64_t               rcv_error     : 1; /**< the receive interface hardware detected a receive error (must be zero in this case) */
        /* lower err_code = first-level descriptor of the work */
        /* zero for packet submitted by hardware that isn't on the slow path */

uint64_t               err_code      : 8; /**< type is cvmx_pip_err_t */
    } s;
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               ip_offset     : 8; /**< HW sets to the number of L2 bytes prior to the IP */
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */

uint64_t port:12;  /**< MAC/PIP port number.  */

uint64_t               dec_ipcomp    : 1; /**< the packet needs to be decompressed */
        uint64_t               tcp_or_udp    : 1; /**< the packet is either TCP or UDP */
        uint64_t               dec_ipsec     : 1; /**< the packet needs to be decrypted (ESP or AH) */
        uint64_t               is_v6         : 1; /**< the packet is IPv6 */

/* (rcv_error, not_IP, IP_exc, is_frag, L4_error, software, etc.) */

uint64_t               err_code      : 8; /**< type is cvmx_pip_err_t */
    } s_cn68xx;
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               ip_offset     : 8; /**< HW sets to the number of L2 bytes prior to the IP */
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */
        uint64_t               pr            : 4; /**< Ring Identifier (if PCIe). Requires PIP_GBL_CTL[RING_EN]=1 */
        uint64_t               unassigned2a  :4;
        uint64_t               unassigned2   :4;

/* (rcv_error, not_IP, IP_exc, is_frag, L4_error, software, etc.) */

uint64_t               err_code      : 8; /**< type is cvmx_pip_err_t */
    } s_cn38xx;

/**< use this to get at the 16 vlan bits */
    struct
    {
        uint64_t               unused1       :16;
        uint64_t               vlan          :16;
        uint64_t               unused2       :32;
    } svlan;

/**< use this struct if the hardware could not determine that the packet is ip */
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               unused        : 8;
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */

uint64_t varies:12; /**< 38xx and 68xx have different definitions.  */
	    uint64_t unassigned2:4;

uint64_t               software      : 1; /**< reserved for software use, hardware will clear on packet creation */
        uint64_t               unassigned3   : 1;
        uint64_t               is_rarp       : 1; /**< set if the hardware determined that the packet is rarp */
        uint64_t               is_arp        : 1; /**< set if the hardware determined that the packet is arp */
        uint64_t               is_bcast      : 1; /**< set if the hardware determined that the packet is a broadcast */
        uint64_t               is_mcast      : 1; /**< set if the hardware determined that the packet is a multi-cast */
        uint64_t               not_IP        : 1; /**< set if the packet may not be IP (must be one in this case) */
        uint64_t               rcv_error     : 1; /**< the receive interface hardware detected a receive error.
                                                    Failure indicated in err_code below, decode:
                                                    - 1 = partial error: a packet was partially received, but internal
                                                        buffering / bandwidth was not adequate to receive the entire packet.
                                                    - 2 = jabber error: the RGMII packet was too large and is truncated.
                                                    - 3 = overrun error: the RGMII packet is longer than allowed and had
                                                        an FCS error.
                                                    - 4 = oversize error: the RGMII packet is longer than allowed.
                                                    - 5 = alignment error: the RGMII packet is not an integer number of bytes
                                                        and had an FCS error (100M and 10M only).
                                                    - 6 = fragment error: the RGMII packet is shorter than allowed and had an
                                                        FCS error.
                                                    - 7 = GMX FCS error: the RGMII packet had an FCS error.
                                                    - 8 = undersize error: the RGMII packet is shorter than allowed.
                                                    - 9 = extend error: the RGMII packet had an extend error.
                                                    - 10 = length mismatch error: the RGMII packet had a length that did not
                                                        match the length field in the L2 HDR.
                                                    - 11 = RGMII RX error/SPI4 DIP4 Error: the RGMII packet had one or more
                                                        data reception errors (RXERR) or the SPI4 packet had one or more DIP4
                                                        errors.
                                                    - 12 = RGMII skip error/SPI4 Abort Error: the RGMII packet was not large
                                                        enough to cover the skipped bytes or the SPI4 packet was terminated
                                                        with an About EOPS.
                                                    - 13 = RGMII nibble error/SPI4 Port NXA Error: the RGMII packet had a
                                                        studder error (data not repeated - 10/100M only) or the SPI4 packet
                                                        was sent to an NXA.
                                                    - 16 = FCS error: a SPI4.2 packet had an FCS error.
                                                    - 17 = Skip error: a packet was not large enough to cover the skipped bytes.
                                                    - 18 = L2 header malformed: the packet is not long enough to contain the L2 */

/* lower err_code = first-level descriptor of the work */
        /* zero for packet submitted by hardware that isn't on the slow path */
      uint64_t               err_code       : 8; /* type is cvmx_pip_err_t (union, so can't use directly */
    } snoip;
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               unused        : 8;
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */

uint64_t port:12; /**< MAC/PIP port number.  */
	    uint64_t unassigned2:4;

/* lower err_code = first-level descriptor of the work */
        /* zero for packet submitted by hardware that isn't on the slow path */
      uint64_t               err_code       : 8; /* type is cvmx_pip_err_t (union, so can't use directly */
    } snoip_cn68xx;
    struct
    {
        uint64_t               bufs          : 8; /**< HW sets this to the number of buffers used by this packet */
        uint64_t               unused        : 8;
        uint64_t               vlan_valid    : 1; /**< set to 1 if we found DSA/VLAN in the L2 */
        uint64_t               vlan_stacked  : 1; /**< Set to 1 if the DSA/VLAN tag is stacked */
        uint64_t               unassigned    : 1;
        uint64_t               vlan_cfi      : 1; /**< HW sets to the DSA/VLAN CFI flag (valid when vlan_valid) */
        uint64_t               vlan_id       :12; /**< HW sets to the DSA/VLAN_ID field (valid when vlan_valid) */
        uint64_t               pr            : 4; /**< Ring Identifier (if PCIe). Requires PIP_GBL_CTL[RING_EN]=1 */
        uint64_t               unassigned2a  :8;
        uint64_t               unassigned2   :4;

} cvmx_pip_wqe_word2_t;

typedef union {
	struct {
		/**
		 * raw chksum result generated by the HW
		 */
		uint16_t                   hw_chksum;
		/**
		 * Field unused by hardware - available for software
		 */
		uint8_t                    unused;
		/**
		 * Next pointer used by hardware for list maintenance.
		 * May be written/read by HW before the work queue
		 * entry is scheduled to a PP (Only 36 bits used in
		 * Octeon 1)
		 */
		uint64_t                   next_ptr      : 40;

} cn38xx;
	struct {
		uint64_t l4ptr:8;	/* 56..63 */
		uint64_t unused0:8;	/* 48..55 */
		uint64_t l3ptr:8;	/* 40..47 */
		uint64_t l2ptr:8;	/* 32..39 */
		uint64_t unused1:18;	/* 14..31 */
		uint64_t bpid:6;	/* 8..13 */
		uint64_t unused2:2;	/* 6..7 */
		uint64_t pknd:6;	/* 0..5 */
	} cn68xx;
} cvmx_pip_wqe_word0_t;

typedef union {
	uint64_t u64;
	cvmx_pip_wqe_word0_t pip;
	struct {
		uint64_t unused:24;
		uint64_t next_ptr:40; /* on cn68xx this is unused as well */

} raw;
} cvmx_wqe_word0_t;

typedef union {
	uint64_t u64;
	struct {
		uint64_t len:16;
		uint64_t varies:14;
		/**
		 * the type of the tag (ORDERED, ATOMIC, NULL)
		 */
		cvmx_pow_tag_type_t tag_type:2;
		uint64_t tag:32;
	} s;
	struct {
		uint64_t len:16;
		uint64_t zero_0:1;
		/**
		 * HW sets this to what it thought the priority of the input packet was
		 */
		uint64_t qos:3;

uint64_t zero_1:1;
		/**
		 * the group that the work queue entry will be scheduled to
		 */
		uint64_t grp:6;
		uint64_t zero_2:3;
		cvmx_pow_tag_type_t tag_type:2;
		uint64_t tag:32;
	} cn68xx;
	struct {
		uint64_t len:16;
		/**
		 * HW sets this to input physical port
		 */
		uint64_t ipprt:6;

/**
		 * HW sets this to what it thought the priority of the input packet was
		 */
		uint64_t qos:3;

/**
		 * the group that the work queue entry will be scheduled to
		 */
		uint64_t grp:4;
		uint64_t zero_2:1;
		cvmx_pow_tag_type_t tag_type:2;
		uint64_t tag:32;
	} cn38xx;
} cvmx_wqe_word1_t;

/**
 * Work queue entry format
 *
 * must be 8-byte aligned
 */
typedef struct
{

/*****************************************************************
     * WORD 0
     *  HW WRITE: the following 64 bits are filled by HW when a packet arrives
     */

cvmx_wqe_word0_t word0;

/*****************************************************************
     * WORD 1
     *  HW WRITE: the following 64 bits are filled by HW when a packet arrives
     */

cvmx_wqe_word1_t word1;
    /**
     * WORD 2
     *   HW WRITE: the following 64-bits are filled in by hardware when a packet arrives
     *   This indicates a variety of status and error conditions.
     */
    cvmx_pip_wqe_word2_t       word2;

/**
     * Pointer to the first segment of the packet.
     */
    cvmx_buf_ptr_t             packet_ptr;

/**
     *   HW WRITE: octeon will fill in a programmable amount from the
     *             packet, up to (at most, but perhaps less) the amount
     *             needed to fill the work queue entry to 128 bytes
     *   If the packet is recognized to be IP, the hardware starts (except that
     *   the IPv4 header is padded for appropriate alignment) writing here where
     *   the IP header starts.
     *   If the packet is not recognized to be IP, the hardware starts writing
     *   the beginning of the packet here.
     */
    uint8_t packet_data[96];

/**
     * If desired, SW can make the work Q entry any length. For the
     * purposes of discussion here, Assume 128B always, as this is all that
     * the hardware deals with.
     *
     */

}  CVMX_CACHE_LINE_ALIGNED cvmx_wqe_t;

static inline int cvmx_wqe_get_port(cvmx_wqe_t *work)
{
    int port;

if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	port = work->word2.s_cn68xx.port;
    else
	port = work->word1.cn38xx.ipprt;

return port;
}

static inline void cvmx_wqe_set_port(cvmx_wqe_t *work, int port)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	port = work->word2.s_cn68xx.port = port;
    else
	port = work->word1.cn38xx.ipprt = port;
}

static inline int cvmx_wqe_get_grp(cvmx_wqe_t *work)
{
    int grp;

if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	grp = work->word1.cn68xx.grp;
    else
	grp = work->word1.cn38xx.grp;

return grp;
}

static inline void cvmx_wqe_set_grp(cvmx_wqe_t *work, int grp)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	work->word1.cn68xx.grp = grp;
    else
	work->word1.cn38xx.grp = grp;
}

static inline int cvmx_wqe_get_qos(cvmx_wqe_t *work)
{
    int qos;

if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	qos = work->word1.cn68xx.qos;
    else
	qos = work->word1.cn38xx.qos;

return qos;
}

static inline void cvmx_wqe_set_qos(cvmx_wqe_t *work, int qos)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	work->word1.cn68xx.qos = qos;
    else
	work->word1.cn38xx.qos = qos;
}

static inline int cvmx_wqe_get_len(cvmx_wqe_t *work)
{
    int len;

if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	len = work->word1.cn68xx.len;
    else
	len = work->word1.cn38xx.len;

return len;
}

static inline void cvmx_wqe_set_len(cvmx_wqe_t *work, int len)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	work->word1.cn68xx.len = len;
    else
	work->word1.cn38xx.len = len;
}

static inline uint32_t cvmx_wqe_get_tag(cvmx_wqe_t *work)
{
    return work->word1.s.tag;
}

static inline void cvmx_wqe_set_tag(cvmx_wqe_t *work, uint32_t  tag)
{
    work->word1.s.tag = tag;
}

static inline int cvmx_wqe_get_tt(cvmx_wqe_t *work)
{
    return work->word1.s.tag_type;
}

static inline void cvmx_wqe_set_tt(cvmx_wqe_t *work, int tt)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
    {
	work->word1.cn68xx.tag_type = (cvmx_pow_tag_type_t)tt;
        work->word1.cn68xx.zero_2 = 0;
    }
    else
    {
	work->word1.cn38xx.tag_type = (cvmx_pow_tag_type_t)tt;
        work->word1.cn38xx.zero_2 = 0;
    }
}

static inline int cvmx_wqe_get_unused8(cvmx_wqe_t *work)
{
    int len;

if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	len = work->word0.pip.cn68xx.unused1;
    else
	len = work->word0.pip.cn38xx.unused;

return len;
}

static inline void cvmx_wqe_set_unused8(cvmx_wqe_t *work, int v)
{
    if (octeon_has_feature(OCTEON_FEATURE_CN68XX_WQE))
	work->word0.pip.cn68xx.unused1 = v;
    else
	work->word0.pip.cn38xx.unused = v;
}

#ifdef	__cplusplus
}
#endif

#endif /* __CVMX_WQE_H__ */

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