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common_entry_exit_abi1.S
(2.47 KB)
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common_entry_exit_abi2.S
(6.9 KB)
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common_entry_exit_legacy.S
(4.31 KB)
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dfaddsub.S
(8.1 KB)
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dfdiv.S
(9.62 KB)
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dffma.S
(13.39 KB)
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dfminmax.S
(1.74 KB)
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dfmul.S
(9.31 KB)
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dfsqrt.S
(8.4 KB)
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divdi3.S
(2.4 KB)
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divsi3.S
(1.36 KB)
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fastmath2_dlib_asm.S
(12.11 KB)
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fastmath2_ldlib_asm.S
(8.57 KB)
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fastmath_dlib_asm.S
(10.52 KB)
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memcpy_forward_vp4cp4n2.S
(3.42 KB)
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memcpy_likely_aligned.S
(1.31 KB)
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moddi3.S
(2.36 KB)
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modsi3.S
(1.09 KB)
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sfdiv_opt.S
(1.44 KB)
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sfsqrt_opt.S
(1.77 KB)
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udivdi3.S
(2.23 KB)
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udivmoddi4.S
(2.24 KB)
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udivmodsi4.S
(1.14 KB)
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udivsi3.S
(1.06 KB)
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umoddi3.S
(2.26 KB)
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umodsi3.S
(1013 B)
Editing: divdi3.S
//===----------------------Hexagon builtin routine ------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// .macro FUNCTION_BEGIN name .text .p2align 5 .globl \name .type \name, @function \name: .endm .macro FUNCTION_END name .size \name, . - \name .endm FUNCTION_BEGIN __hexagon_divdi3 { p2 = tstbit(r1,#31) p3 = tstbit(r3,#31) } { r1:0 = abs(r1:0) r3:2 = abs(r3:2) } { r6 = cl0(r1:0) // count leading 0's of dividend (numerator) r7 = cl0(r3:2) // count leading 0's of divisor (denominator) r5:4 = r3:2 // divisor moved into working registers r3:2 = r1:0 // dividend is the initial remainder, r3:2 contains remainder } { p3 = xor(p2,p3) r10 = sub(r7,r6) // left shift count for bit & divisor r1:0 = #0 // initialize quotient to 0 r15:14 = #1 // initialize bit to 1 } { r11 = add(r10,#1) // loop count is 1 more than shift count r13:12 = lsl(r5:4,r10) // shift divisor msb into same bit position as dividend msb r15:14 = lsl(r15:14,r10) // shift the bit left by same amount as divisor } { p0 = cmp.gtu(r5:4,r3:2) // check if divisor > dividend loop0(1f,r11) // register loop } { if (p0) jump .hexagon_divdi3_return // if divisor > dividend, we're done, so return } .falign 1: { p0 = cmp.gtu(r13:12,r3:2) // set predicate reg if shifted divisor > current remainder } { r7:6 = sub(r3:2, r13:12) // subtract shifted divisor from current remainder r9:8 = add(r1:0, r15:14) // save current quotient to temp (r9:8) } { r1:0 = vmux(p0, r1:0, r9:8) // choose either current quotient or new quotient (r9:8) r3:2 = vmux(p0, r3:2, r7:6) // choose either current remainder or new remainder (r7:6) } { r15:14 = lsr(r15:14, #1) // shift bit right by 1 for next iteration r13:12 = lsr(r13:12, #1) // shift "shifted divisor" right by 1 for next iteration }:endloop0 .hexagon_divdi3_return: { r3:2 = neg(r1:0) } { r1:0 = vmux(p3,r3:2,r1:0) jumpr r31 } FUNCTION_END __hexagon_divdi3 .globl __qdsp_divdi3 .set __qdsp_divdi3, __hexagon_divdi3
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