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📄 bcm_osal.h(19.56 KB)
📄 common_hsi.h(61.66 KB)
📄 ecore.h(27.87 KB)
📄 ecore_chain.h(22.8 KB)
📄 ecore_cxt.c(77.15 KB)
📄 ecore_cxt.h(6.75 KB)
📄 ecore_cxt_api.h(2.18 KB)
📄 ecore_dbg_fw_funcs.c(213.09 KB)
📄 ecore_dbg_fw_funcs.h(32.17 KB)
📄 ecore_dbg_values.h(600.82 KB)
📄 ecore_dcbx.c(54.45 KB)
📄 ecore_dcbx.h(2.99 KB)
📄 ecore_dcbx_api.h(7.84 KB)
📄 ecore_dev.c(200.72 KB)
📄 ecore_dev_api.h(22.83 KB)
📄 ecore_fcoe.h(2.54 KB)
📄 ecore_fcoe_api.h(4.17 KB)
📄 ecore_gtt_reg_addr.h(3.08 KB)
📄 ecore_gtt_values.h(2.06 KB)
📄 ecore_hsi_common.h(113.62 KB)
📄 ecore_hsi_debug_tools.h(31.34 KB)
📄 ecore_hsi_eth.h(162.39 KB)
📄 ecore_hsi_fcoe.h(77.08 KB)
📄 ecore_hsi_init_func.h(4.38 KB)
📄 ecore_hsi_init_tool.h(11.21 KB)
📄 ecore_hsi_iscsi.h(66.12 KB)
📄 ecore_hsi_iwarp.h(85.78 KB)
📄 ecore_hsi_rdma.h(109.48 KB)
📄 ecore_hsi_roce.h(152.46 KB)
📄 ecore_hw.c(34.16 KB)
📄 ecore_hw.h(7.51 KB)
📄 ecore_hw_defs.h(2.89 KB)
📄 ecore_init_fw_funcs.c(62.36 KB)
📄 ecore_init_fw_funcs.h(18.03 KB)
📄 ecore_init_ops.c(17.8 KB)
📄 ecore_init_ops.h(3.48 KB)
📄 ecore_init_values.h(3.82 MB)
📄 ecore_int.c(82.2 KB)
📄 ecore_int.h(7.81 KB)
📄 ecore_int_api.h(9.68 KB)
📄 ecore_iov_api.h(26.59 KB)
📄 ecore_iro.h(12.77 KB)
📄 ecore_iro_values.h(6.43 KB)
📄 ecore_iscsi.h(5.06 KB)
📄 ecore_iscsi_api.h(9.68 KB)
📄 ecore_iwarp.c(112.7 KB)
📄 ecore_iwarp.h(9.35 KB)
📄 ecore_l2.c(70.53 KB)
📄 ecore_l2.h(5.65 KB)
📄 ecore_l2_api.h(14.78 KB)
📄 ecore_ll2.c(64.13 KB)
📄 ecore_ll2.h(4.8 KB)
📄 ecore_ll2_api.h(9.31 KB)
📄 ecore_mcp.c(137.13 KB)
📄 ecore_mcp.h(18.21 KB)
📄 ecore_mcp_api.h(34.74 KB)
📄 ecore_mng_tlv.c(41.74 KB)
📄 ecore_ooo.c(17.19 KB)
📄 ecore_ooo.h(4.38 KB)
📄 ecore_proto_if.h(5.1 KB)
📄 ecore_rdma.c(77.63 KB)
📄 ecore_rdma.h(8.2 KB)
📄 ecore_rdma_api.h(27.11 KB)
📄 ecore_roce.c(44.5 KB)
📄 ecore_roce.h(3.15 KB)
📄 ecore_roce_api.h(24.77 KB)
📄 ecore_rt_defs.h(39.47 KB)
📄 ecore_sp_api.h(2.8 KB)
📄 ecore_sp_commands.c(21.81 KB)
📄 ecore_sp_commands.h(5.51 KB)
📄 ecore_spq.c(32.43 KB)
📄 ecore_spq.h(10.68 KB)
📄 ecore_sriov.c(138.24 KB)
📄 ecore_sriov.h(9.87 KB)
📄 ecore_status.h(1.9 KB)
📄 ecore_tcp_ip.h(3.38 KB)
📄 ecore_utils.h(2.46 KB)
📄 ecore_vf.c(55.16 KB)
📄 ecore_vf.h(13.59 KB)
📄 ecore_vf_api.h(7.97 KB)
📄 ecore_vfpf_if.h(17.38 KB)
📄 eth_common.h(24.37 KB)
📄 fcoe_common.h(55.08 KB)
📄 iscsi_common.h(95.1 KB)
📄 iwarp_common.h(2.48 KB)
📄 mcp_private.h(14.55 KB)
📄 mcp_public.h(87.13 KB)
📄 mfw_hsi.h(2.53 KB)
📄 nvm_cfg.h(135.26 KB)
📄 nvm_map.h(13.94 KB)
📄 pcics_reg_driver.h(26.05 KB)
📄 qlnx_def.h(21.3 KB)
📄 qlnx_ioctl.c(25.47 KB)
📄 qlnx_ioctl.h(8.41 KB)
📄 qlnx_os.c(225.04 KB)
📄 qlnx_os.h(3.96 KB)
📄 qlnx_rdma.c(7.21 KB)
📄 qlnx_rdma.h(2.37 KB)
📄 qlnx_ver.h(1.6 KB)
📄 rdma_common.h(41.19 KB)
📄 reg_addr.h(16.08 MB)
📄 roce_common.h(2.8 KB)
📄 spad_layout.h(10.2 KB)
📄 storage_common.h(7.43 KB)
📄 tcp_common.h(12.41 KB)

Editing: ecore_int.h

/*
 * Copyright (c) 2017-2018 Cavium, Inc. 
 * All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright
 *     notice, this list of conditions and the following disclaimer in the
 *     documentation and/or other materials provided with the distribution.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 *  POSSIBILITY OF SUCH DAMAGE.
 *
 * $FreeBSD$
 *
 */

#ifndef __ECORE_INT_H__
#define __ECORE_INT_H__

#include "ecore.h"
#include "ecore_int_api.h"

#define ECORE_CAU_DEF_RX_TIMER_RES 0
#define ECORE_CAU_DEF_TX_TIMER_RES 0

#define ECORE_SB_ATT_IDX	0x0001
#define ECORE_SB_EVENT_MASK	0x0003

#define SB_ALIGNED_SIZE(p_hwfn)					\
	ALIGNED_TYPE_SIZE(struct status_block_e4, p_hwfn)

#define ECORE_SB_INVALID_IDX	0xffff

struct ecore_igu_block
{
	u8	status;
#define ECORE_IGU_STATUS_FREE	0x01
#define ECORE_IGU_STATUS_VALID	0x02
#define ECORE_IGU_STATUS_PF	0x04
#define ECORE_IGU_STATUS_DSB	0x08

u8	vector_number;
	u8	function_id;
	u8      is_pf;

/* Index inside IGU [meant for back reference] */
	u16 igu_sb_id;

struct ecore_sb_info *sb_info;
};

struct ecore_igu_info
{
	struct ecore_igu_block entry[MAX_TOT_SB_PER_PATH];
	u16 igu_dsb_id;

/* The numbers can shift when using APIs to switch SBs between PF and
	 * VF.
	 */
	struct ecore_sb_cnt_info usage;

/* Determine whether we can shift SBs between VFs and PFs */
	bool b_allow_pf_vf_change;
};

/**
 * @brief - Make sure the IGU CAM reflects the resources provided by MFW
 *
 * @param p_hwfn
 * @param p_ptt
 */
int ecore_int_igu_reset_cam(struct ecore_hwfn *p_hwfn,
			    struct ecore_ptt *p_ptt);

/**
 * @brief - Make sure IGU CAM reflects the default resources once again,
 *          starting with a 'dirty' SW database.
 * @param p_hwfn
 * @param p_ptt
 */
int ecore_int_igu_reset_cam_default(struct ecore_hwfn *p_hwfn,
				    struct ecore_ptt *p_ptt);

/**
 * @brief Translate the weakly-defined client sb-id into an IGU sb-id
 *
 * @param p_hwfn
 * @param sb_id - user provided sb_id
 *
 * @return an index inside IGU CAM where the SB resides
 */
u16 ecore_get_igu_sb_id(struct ecore_hwfn *p_hwfn, u16 sb_id);

/**
 * @brief return a pointer to an unused valid SB
 *
 * @param p_hwfn
 * @param b_is_pf - true iff we want a SB belonging to a PF
 *
 * @return point to an igu_block, OSAL_NULL if none is available
 */
struct ecore_igu_block *
ecore_get_igu_free_sb(struct ecore_hwfn *p_hwfn, bool b_is_pf);

/* TODO Names of function may change... */
void ecore_int_igu_init_pure_rt(struct ecore_hwfn	*p_hwfn,
				 struct ecore_ptt	*p_ptt,
				 bool			b_set,
				 bool			b_slowpath);

void ecore_int_igu_init_rt(struct ecore_hwfn		*p_hwfn);

/**
 * @brief ecore_int_igu_read_cam - Reads the IGU CAM.
 *	This function needs to be called during hardware
 *	prepare. It reads the info from igu cam to know which
 *	status block is the default / base status block etc.
 *
 * @param p_hwfn
 * @param p_ptt
 *
 * @return enum _ecore_status_t
 */
enum _ecore_status_t ecore_int_igu_read_cam(struct ecore_hwfn	*p_hwfn,
					    struct ecore_ptt	*p_ptt);

typedef enum _ecore_status_t(*ecore_int_comp_cb_t)(struct ecore_hwfn *p_hwfn,
						   void *cookie);
/**
 * @brief ecore_int_register_cb - Register callback func for
 *      slowhwfn statusblock.
 *
 *	Every protocol that uses the slowhwfn status block
 *	should register a callback function that will be called
 *	once there is an update of the sp status block.
 *
 * @param p_hwfn
 * @param comp_cb - function to be called when there is an
 *                  interrupt on the sp sb
 *
 * @param cookie  - passed to the callback function
 * @param sb_idx  - OUT parameter which gives the chosen index
 *                  for this protocol.
 * @param p_fw_cons  - pointer to the actual address of the
 *                     consumer for this protocol.
 *
 * @return enum _ecore_status_t
 */
enum _ecore_status_t ecore_int_register_cb(struct ecore_hwfn    *p_hwfn,
					   ecore_int_comp_cb_t  comp_cb,
					   void                 *cookie,
					   u8                   *sb_idx,
					   __le16               **p_fw_cons);
/**
 * @brief ecore_int_unregister_cb - Unregisters callback
 *      function from sp sb.
 *      Partner of ecore_int_register_cb -> should be called
 *      when no longer required.
 *
 * @param p_hwfn
 * @param pi
 *
 * @return enum _ecore_status_t
 */
enum _ecore_status_t ecore_int_unregister_cb(struct ecore_hwfn *p_hwfn,
					     u8 pi);

/**
 * @brief ecore_int_get_sp_sb_id - Get the slowhwfn sb id.
 *
 * @param p_hwfn
 *
 * @return u16
 */
u16 ecore_int_get_sp_sb_id(struct ecore_hwfn *p_hwfn);

/**
 * @brief Status block cleanup. Should be called for each status
 *        block that will be used -> both PF / VF
 *
 * @param p_hwfn
 * @param p_ptt
 * @param sb_id		- igu status block id
 * @param opaque	- opaque fid of the sb owner.
 * @param cleanup_set	- set(1) / clear(0)
 */
void ecore_int_igu_init_pure_rt_single(struct ecore_hwfn	*p_hwfn,
				       struct ecore_ptt		*p_ptt,
				       u16			sb_id,
				       u16			opaque,
				       bool			b_set);

/**
 * @brief ecore_int_cau_conf - configure cau for a given status
 *        block
 *
 * @param p_hwfn
 * @param ptt
 * @param sb_phys
 * @param igu_sb_id
 * @param vf_number
 * @param vf_valid
 */
void ecore_int_cau_conf_sb(struct ecore_hwfn	*p_hwfn,
			   struct ecore_ptt	*p_ptt,
			   dma_addr_t		sb_phys,
			   u16			igu_sb_id,
			   u16			vf_number,
			   u8			vf_valid);

/**
* @brief ecore_int_alloc
*
* @param p_hwfn
 * @param p_ptt
*
* @return enum _ecore_status_t
*/
enum _ecore_status_t ecore_int_alloc(struct ecore_hwfn	*p_hwfn,
				     struct ecore_ptt	*p_ptt);

/**
* @brief ecore_int_free
*
* @param p_hwfn
*/
void ecore_int_free(struct ecore_hwfn *p_hwfn);

/**
* @brief ecore_int_setup
*
* @param p_hwfn
* @param p_ptt
*/
void ecore_int_setup(struct ecore_hwfn	*p_hwfn,
		     struct ecore_ptt	*p_ptt);

/**
 * @brief - Enable Interrupt & Attention for hw function
 *
 * @param p_hwfn
 * @param p_ptt
 * @param int_mode
 *
* @return enum _ecore_status_t
 */
enum _ecore_status_t ecore_int_igu_enable(struct ecore_hwfn *p_hwfn,
					  struct ecore_ptt *p_ptt,
					  enum ecore_int_mode int_mode);

/**
 * @brief - Initialize CAU status block entry
 *
 * @param p_hwfn
 * @param p_sb_entry
 * @param pf_id
 * @param vf_number
 * @param vf_valid
 */
void ecore_init_cau_sb_entry(struct ecore_hwfn *p_hwfn,
			     struct cau_sb_entry *p_sb_entry, u8 pf_id,
			     u16 vf_number, u8 vf_valid);

enum _ecore_status_t ecore_int_set_timer_res(struct ecore_hwfn *p_hwfn,
					     struct ecore_ptt *p_ptt,
					     u8 timer_res, u16 sb_id, bool tx);
#ifndef ASIC_ONLY
#define ECORE_MAPPING_MEMORY_SIZE(dev) \
	((CHIP_REV_IS_SLOW(dev) && (!(dev)->b_is_emul_full)) ? \
	 136 : NUM_OF_SBS(dev))
#else
#define ECORE_MAPPING_MEMORY_SIZE(dev) NUM_OF_SBS(dev)
#endif

enum _ecore_status_t ecore_pglueb_rbc_attn_handler(struct ecore_hwfn *p_hwfn,
						   struct ecore_ptt *p_ptt);

#endif /* __ECORE_INT_H__ */

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