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ef10_ev.c
(38.47 KB)
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ef10_filter.c
(48.25 KB)
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ef10_image.c
(22.76 KB)
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ef10_impl.h
(28.32 KB)
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ef10_intr.c
(4.71 KB)
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ef10_mac.c
(31.92 KB)
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ef10_mcdi.c
(9.59 KB)
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ef10_nic.c
(62.96 KB)
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ef10_nvram.c
(54.36 KB)
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ef10_phy.c
(20.26 KB)
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ef10_rx.c
(30.8 KB)
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ef10_signed_image_layout.h
(3.9 KB)
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ef10_tlv_layout.h
(33.34 KB)
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ef10_tx.c
(19.03 KB)
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ef10_vpd.c
(11.03 KB)
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efsys.h
(31.95 KB)
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efx.h
(82.48 KB)
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efx_annote.h
(4.06 KB)
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efx_bootcfg.c
(25.55 KB)
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efx_check.h
(11.67 KB)
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efx_crc32.c
(5.45 KB)
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efx_ev.c
(34.49 KB)
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efx_filter.c
(39.47 KB)
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efx_hash.c
(8.08 KB)
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efx_impl.h
(38.52 KB)
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efx_intr.c
(14.56 KB)
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efx_lic.c
(37.43 KB)
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efx_mac.c
(22.27 KB)
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efx_mcdi.c
(58.17 KB)
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efx_mcdi.h
(13.28 KB)
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efx_mon.c
(23.85 KB)
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efx_nic.c
(28.89 KB)
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efx_nvram.c
(24.9 KB)
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efx_phy.c
(13.44 KB)
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efx_phy_ids.h
(2.04 KB)
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efx_port.c
(5.99 KB)
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efx_regs.h
(118.32 KB)
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efx_regs_ef10.h
(21.93 KB)
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efx_regs_mcdi.h
(769.41 KB)
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efx_regs_mcdi_aoe.h
(125.41 KB)
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efx_regs_mcdi_strs.h
(8.54 KB)
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efx_regs_pci.h
(55.57 KB)
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efx_rx.c
(39.55 KB)
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efx_sram.c
(8.76 KB)
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efx_tunnel.c
(11.69 KB)
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efx_tx.c
(27.1 KB)
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efx_types.h
(57.59 KB)
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efx_vpd.c
(20.8 KB)
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hunt_impl.h
(2.36 KB)
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hunt_nic.c
(7.76 KB)
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mcdi_mon.c
(16.08 KB)
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mcdi_mon.h
(2.47 KB)
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medford2_impl.h
(2.1 KB)
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medford2_nic.c
(5.53 KB)
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medford_impl.h
(2.04 KB)
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medford_nic.c
(5.39 KB)
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siena_flash.h
(9.02 KB)
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siena_impl.h
(10.2 KB)
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siena_mac.c
(15.58 KB)
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siena_mcdi.c
(6.87 KB)
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siena_nic.c
(20.68 KB)
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siena_nvram.c
(17.89 KB)
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siena_phy.c
(22.34 KB)
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siena_sram.c
(5.46 KB)
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siena_vpd.c
(14.54 KB)
Editing: efx_sram.c
/*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2007-2016 Solarflare Communications Inc. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: * * 1. Redistributions of source code must retain the above copyright notice, * this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright notice, * this list of conditions and the following disclaimer in the documentation * and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * The views and conclusions contained in the software and documentation are * those of the authors and should not be interpreted as representing official * policies, either expressed or implied, of the FreeBSD Project. */ #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); #include "efx.h" #include "efx_impl.h" __checkReturn efx_rc_t efx_sram_buf_tbl_set( __in efx_nic_t *enp, __in uint32_t id, __in efsys_mem_t *esmp, __in size_t n) { efx_qword_t qword; uint32_t start = id; uint32_t stop = start + n; efsys_dma_addr_t addr; efx_oword_t oword; unsigned int count; efx_rc_t rc; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 if (enp->en_family == EFX_FAMILY_HUNTINGTON || enp->en_family == EFX_FAMILY_MEDFORD || enp->en_family == EFX_FAMILY_MEDFORD2) { /* * FIXME: the efx_sram_buf_tbl_*() functionality needs to be * pulled inside the Falcon/Siena queue create/destroy code, * and then the original functions can be removed (see bug30834 * comment #1). But, for now, we just ensure that they are * no-ops for EF10, to allow bringing up existing drivers * without modification. */ return (0); } #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */ if (stop >= EFX_BUF_TBL_SIZE) { rc = EFBIG; goto fail1; } /* Add the entries into the buffer table */ addr = EFSYS_MEM_ADDR(esmp); for (id = start; id != stop; id++) { EFX_POPULATE_QWORD_5(qword, FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0, FRF_AZ_BUF_ADR_FBUF_DW0, (uint32_t)((addr >> 12) & 0xffffffff), FRF_AZ_BUF_ADR_FBUF_DW1, (uint32_t)((addr >> 12) >> 32), FRF_AZ_BUF_OWNER_ID_FBUF, 0); EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL, id, &qword); addr += EFX_BUF_SIZE; } EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1); /* Flush the write buffer */ EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1, FRF_AZ_BUF_CLR_CMD, 0); EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); /* Poll for the last entry being written to the buffer table */ EFSYS_ASSERT3U(id, ==, stop); addr -= EFX_BUF_SIZE; count = 0; do { EFSYS_PROBE1(wait, unsigned int, count); /* Spin for 1 ms */ EFSYS_SPIN(1000); EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL, id - 1, &qword); if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) == (uint32_t)((addr >> 12) & 0xffffffff) && EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) == (uint32_t)((addr >> 12) >> 32)) goto verify; } while (++count < 100); rc = ETIMEDOUT; goto fail2; verify: /* Verify the rest of the entries in the buffer table */ while (--id != start) { addr -= EFX_BUF_SIZE; /* Read the buffer table entry */ EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL, id - 1, &qword); if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) != (uint32_t)((addr >> 12) & 0xffffffff) || EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) != (uint32_t)((addr >> 12) >> 32)) { rc = EFAULT; goto fail3; } } return (0); fail3: EFSYS_PROBE(fail3); id = stop; fail2: EFSYS_PROBE(fail2); EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0, FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1, FRF_AZ_BUF_CLR_START_ID, start); EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); fail1: EFSYS_PROBE1(fail1, efx_rc_t, rc); return (rc); } void efx_sram_buf_tbl_clear( __in efx_nic_t *enp, __in uint32_t id, __in size_t n) { efx_oword_t oword; uint32_t start = id; uint32_t stop = start + n; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 if (enp->en_family == EFX_FAMILY_HUNTINGTON || enp->en_family == EFX_FAMILY_MEDFORD || enp->en_family == EFX_FAMILY_MEDFORD2) { /* * FIXME: the efx_sram_buf_tbl_*() functionality needs to be * pulled inside the Falcon/Siena queue create/destroy code, * and then the original functions can be removed (see bug30834 * comment #1). But, for now, we just ensure that they are * no-ops for EF10, to allow bringing up existing drivers * without modification. */ return; } #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */ EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE); EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1); EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0, FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1, FRF_AZ_BUF_CLR_START_ID, start); EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword); } #if EFSYS_OPT_DIAG static void efx_sram_byte_increment_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; unsigned int index; _NOTE(ARGUNUSED(negate)) for (index = 0; index < sizeof (efx_qword_t); index++) eqp->eq_u8[index] = offset + index; } static void efx_sram_all_the_same_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { _NOTE(ARGUNUSED(row)) if (negate) EFX_SET_QWORD(*eqp); else EFX_ZERO_QWORD(*eqp); } static void efx_sram_bit_alternate_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { _NOTE(ARGUNUSED(row)) EFX_POPULATE_QWORD_2(*eqp, EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa, EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa); } static void efx_sram_byte_alternate_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { _NOTE(ARGUNUSED(row)) EFX_POPULATE_QWORD_2(*eqp, EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00, EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00); } static void efx_sram_byte_changing_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; unsigned int index; for (index = 0; index < sizeof (efx_qword_t); index++) { uint8_t byte; if (offset / 256 == 0) byte = (uint8_t)((offset % 257) % 256); else byte = (uint8_t)(~((offset - 8) % 257) % 256); eqp->eq_u8[index] = (negate) ? ~byte : byte; } } static void efx_sram_bit_sweep_set( __in size_t row, __in boolean_t negate, __out efx_qword_t *eqp) { size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; if (negate) { EFX_SET_QWORD(*eqp); EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64); } else { EFX_ZERO_QWORD(*eqp); EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64); } } efx_sram_pattern_fn_t __efx_sram_pattern_fns[] = { efx_sram_byte_increment_set, efx_sram_all_the_same_set, efx_sram_bit_alternate_set, efx_sram_byte_alternate_set, efx_sram_byte_changing_set, efx_sram_bit_sweep_set }; __checkReturn efx_rc_t efx_sram_test( __in efx_nic_t *enp, __in efx_pattern_type_t type) { efx_sram_pattern_fn_t func; EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC); EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC); EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX)); EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX)); EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV)); /* SRAM testing is only available on Siena. */ if (enp->en_family != EFX_FAMILY_SIENA) return (0); /* Select pattern generator */ EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES); func = __efx_sram_pattern_fns[type]; return (siena_sram_test(enp, func)); } #endif /* EFSYS_OPT_DIAG */
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