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📄 __clang_cuda_builtin_vars.h(4.56 KB)
📄 __clang_cuda_cmath.h(16.37 KB)
📄 __clang_cuda_complex_builtins.h(8.5 KB)
📄 __clang_cuda_device_functions.h(55.59 KB)
📄 __clang_cuda_intrinsics.h(21.59 KB)
📄 __clang_cuda_libdevice_declares.h(21.73 KB)
📄 __clang_cuda_math.h(15.91 KB)
📄 __clang_cuda_math_forward_declares.h(8.21 KB)
📄 __clang_cuda_runtime_wrapper.h(14.85 KB)
📄 __clang_hip_libdevice_declares.h(19.19 KB)
📄 __clang_hip_math.h(35.41 KB)
📄 __clang_hip_runtime_wrapper.h(1.79 KB)
📄 __stddef_max_align_t.h(857 B)
📄 __wmmintrin_aes.h(5.14 KB)
📄 __wmmintrin_pclmul.h(2.01 KB)
📄 adxintrin.h(2.32 KB)
📄 altivec.h(609.12 KB)
📄 ammintrin.h(7.42 KB)
📄 amxintrin.h(8.24 KB)
📄 arm64intr.h(993 B)
📄 arm_acle.h(21.87 KB)
📄 arm_bf16.h(548 B)
📄 arm_cde.h(32.67 KB)
📄 arm_cmse.h(6.21 KB)
📄 arm_fp16.h(16.97 KB)
📄 arm_mve.h(1.48 MB)
📄 arm_neon.h(2.31 MB)
📄 arm_sve.h(1.14 MB)
📄 armintr.h(843 B)
📄 avx2intrin.h(38.11 KB)
📄 avx512bf16intrin.h(10.45 KB)
📄 avx512bitalgintrin.h(2.41 KB)
📄 avx512bwintrin.h(75.17 KB)
📄 avx512cdintrin.h(4.12 KB)
📄 avx512dqintrin.h(58.3 KB)
📄 avx512erintrin.h(11.7 KB)
📄 avx512fintrin.h(377.18 KB)
📄 avx512ifmaintrin.h(2.49 KB)
📄 avx512ifmavlintrin.h(4.44 KB)
📄 avx512pfintrin.h(4.53 KB)
📄 avx512vbmi2intrin.h(13.1 KB)
📄 avx512vbmiintrin.h(3.72 KB)
📄 avx512vbmivlintrin.h(6.94 KB)
📄 avx512vlbf16intrin.h(17.88 KB)
📄 avx512vlbitalgintrin.h(4.23 KB)
📄 avx512vlbwintrin.h(110.39 KB)
📄 avx512vlcdintrin.h(7.66 KB)
📄 avx512vldqintrin.h(46.24 KB)
📄 avx512vlintrin.h(322.04 KB)
📄 avx512vlvbmi2intrin.h(25.59 KB)
📄 avx512vlvnniintrin.h(7.87 KB)
📄 avx512vlvp2intersectintrin.h(4.44 KB)
📄 avx512vnniintrin.h(4.21 KB)
📄 avx512vp2intersectintrin.h(2.9 KB)
📄 avx512vpopcntdqintrin.h(2 KB)
📄 avx512vpopcntdqvlintrin.h(3.31 KB)
📄 avxintrin.h(193.62 KB)
📄 bmi2intrin.h(2.25 KB)
📄 bmiintrin.h(14.02 KB)
📄 cet.h(1.49 KB)
📄 cetintrin.h(2.78 KB)
📄 cldemoteintrin.h(1.18 KB)
📄 clflushoptintrin.h(861 B)
📄 clwbintrin.h(1.2 KB)
📄 clzerointrin.h(1.13 KB)
📄 cpuid.h(10.42 KB)
📁 cuda_wrappers
📄 emmintrin.h(180.78 KB)
📄 enqcmdintrin.h(2.12 KB)
📄 f16cintrin.h(5.37 KB)
📄 fma4intrin.h(6.82 KB)
📄 fmaintrin.h(6.83 KB)
📁 fuzzer
📄 fxsrintrin.h(2.82 KB)
📄 gfniintrin.h(7.66 KB)
📄 htmintrin.h(6.14 KB)
📄 htmxlintrin.h(9.01 KB)
📄 ia32intrin.h(12.65 KB)
📄 immintrin.h(18.38 KB)
📄 invpcidintrin.h(764 B)
📄 lwpintrin.h(5 KB)
📄 lzcntintrin.h(3.18 KB)
📄 mm3dnow.h(4.5 KB)
📄 mm_malloc.h(1.7 KB)
📄 mmintrin.h(55.85 KB)
📄 module.modulemap(3.33 KB)
📄 movdirintrin.h(1.57 KB)
📄 msa.h(25.01 KB)
📄 mwaitxintrin.h(1.07 KB)
📄 nmmintrin.h(580 B)
📄 opencl-c-base.h(20.83 KB)
📄 opencl-c.h(835.47 KB)
📁 openmp_wrappers
📄 pconfigintrin.h(1.19 KB)
📄 pkuintrin.h(934 B)
📄 pmmintrin.h(10.09 KB)
📄 popcntintrin.h(1.58 KB)
📁 ppc_wrappers
📄 prfchwintrin.h(1.93 KB)
📁 profile
📄 ptwriteintrin.h(1.05 KB)
📄 rdseedintrin.h(1.16 KB)
📄 rtmintrin.h(1.24 KB)
📄 s390intrin.h(604 B)
📁 sanitizer
📄 serializeintrin.h(881 B)
📄 sgxintrin.h(1.77 KB)
📄 shaintrin.h(1.87 KB)
📄 smmintrin.h(98.76 KB)
📄 tbmintrin.h(3.15 KB)
📄 tmmintrin.h(29.37 KB)
📄 tsxldtrkintrin.h(1.97 KB)
📄 vadefs.h(1.39 KB)
📄 vaesintrin.h(2.39 KB)
📄 vecintrin.h(356.66 KB)
📄 vpclmulqdqintrin.h(1 KB)
📄 waitpkgintrin.h(1.33 KB)
📄 wasm_simd128.h(45.99 KB)
📄 wbnoinvdintrin.h(749 B)
📄 wmmintrin.h(530 B)
📄 x86intrin.h(1.67 KB)
📄 xmmintrin.h(106.24 KB)
📄 xopintrin.h(19.91 KB)
📁 xray
📄 xsavecintrin.h(1010 B)
📄 xsaveintrin.h(1.64 KB)
📄 xsaveoptintrin.h(1 KB)
📄 xsavesintrin.h(1.24 KB)
📄 xtestintrin.h(873 B)

Editing: f16cintrin.h

/*===---- f16cintrin.h - F16C intrinsics -----------------------------------===
 *
 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 * See https://llvm.org/LICENSE.txt for license information.
 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 *
 *===-----------------------------------------------------------------------===
 */

#if !defined __IMMINTRIN_H
#error "Never use <f16cintrin.h> directly; include <immintrin.h> instead."
#endif

#ifndef __F16CINTRIN_H
#define __F16CINTRIN_H

/* Define the default attributes for the functions in this file. */
#define __DEFAULT_FN_ATTRS128 \
  __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(128)))
#define __DEFAULT_FN_ATTRS256 \
  __attribute__((__always_inline__, __nodebug__, __target__("f16c"), __min_vector_width__(256)))

/* NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h,
 * but that's because icc can emulate these without f16c using a library call.
 * Since we don't do that let's leave these in f16cintrin.h.
 */

/// Converts a 16-bit half-precision float value into a 32-bit float
///    value.
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
///    A 16-bit half-precision float value.
/// \returns The converted 32-bit float value.
static __inline float __DEFAULT_FN_ATTRS128
_cvtsh_ss(unsigned short __a)
{
  __v8hi __v = {(short)__a, 0, 0, 0, 0, 0, 0, 0};
  __v4sf __r = __builtin_ia32_vcvtph2ps(__v);
  return __r[0];
}

/// Converts a 32-bit single-precision float value to a 16-bit
///    half-precision float value.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// unsigned short _cvtss_sh(float a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
///    A 32-bit single-precision float value to be converted to a 16-bit
///    half-precision float value.
/// \param imm
///    An immediate value controlling rounding using bits [2:0]: \n
///    000: Nearest \n
///    001: Down \n
///    010: Up \n
///    011: Truncate \n
///    1XX: Use MXCSR.RC for rounding
/// \returns The converted 16-bit half-precision float value.
#define _cvtss_sh(a, imm) \
  (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \
                                                     (imm)))[0])

/// Converts a 128-bit vector containing 32-bit float values into a
///    128-bit vector containing 16-bit half-precision float values.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// __m128i _mm_cvtps_ph(__m128 a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
///    A 128-bit vector containing 32-bit float values.
/// \param imm
///    An immediate value controlling rounding using bits [2:0]: \n
///    000: Nearest \n
///    001: Down \n
///    010: Up \n
///    011: Truncate \n
///    1XX: Use MXCSR.RC for rounding
/// \returns A 128-bit vector containing converted 16-bit half-precision float
///    values. The lower 64 bits are used to store the converted 16-bit
///    half-precision floating-point values.
#define _mm_cvtps_ph(a, imm) \
  (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm))

/// Converts a 128-bit vector containing 16-bit half-precision float
///    values into a 128-bit vector containing 32-bit float values.
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
///    A 128-bit vector containing 16-bit half-precision float values. The lower
///    64 bits are used in the conversion.
/// \returns A 128-bit vector of [4 x float] containing converted float values.
static __inline __m128 __DEFAULT_FN_ATTRS128
_mm_cvtph_ps(__m128i __a)
{
  return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a);
}

/// Converts a 256-bit vector of [8 x float] into a 128-bit vector
///    containing 16-bit half-precision float values.
///
/// \headerfile <x86intrin.h>
///
/// \code
/// __m128i _mm256_cvtps_ph(__m256 a, const int imm);
/// \endcode
///
/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction.
///
/// \param a
///    A 256-bit vector containing 32-bit single-precision float values to be
///    converted to 16-bit half-precision float values.
/// \param imm
///    An immediate value controlling rounding using bits [2:0]: \n
///    000: Nearest \n
///    001: Down \n
///    010: Up \n
///    011: Truncate \n
///    1XX: Use MXCSR.RC for rounding
/// \returns A 128-bit vector containing the converted 16-bit half-precision
///    float values.
#define _mm256_cvtps_ph(a, imm) \
 (__m128i)__builtin_ia32_vcvtps2ph256((__v8sf)(__m256)(a), (imm))

/// Converts a 128-bit vector containing 16-bit half-precision float
///    values into a 256-bit vector of [8 x float].
///
/// \headerfile <x86intrin.h>
///
/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction.
///
/// \param __a
///    A 128-bit vector containing 16-bit half-precision float values to be
///    converted to 32-bit single-precision float values.
/// \returns A vector of [8 x float] containing the converted 32-bit
///    single-precision float values.
static __inline __m256 __DEFAULT_FN_ATTRS256
_mm256_cvtph_ps(__m128i __a)
{
  return (__m256)__builtin_ia32_vcvtph2ps256((__v8hi)__a);
}

#undef __DEFAULT_FN_ATTRS128
#undef __DEFAULT_FN_ATTRS256

#endif /* __F16CINTRIN_H */

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