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usr / src / sys / contrib / device-tree / src / arm64 / freescale /

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📄 fsl-ls1012a-frdm.dts(1.77 KB)
📄 fsl-ls1012a-frwy.dts(619 B)
📄 fsl-ls1012a-oxalis.dts(1.61 KB)
📄 fsl-ls1012a-qds.dts(2.57 KB)
📄 fsl-ls1012a-rdb.dts(771 B)
📄 fsl-ls1012a.dtsi(13.52 KB)
📄 fsl-ls1028a-kontron-kbox-a-230-ls.dts(1.46 KB)
📄 fsl-ls1028a-kontron-sl28-var2.dts(1.34 KB)
📄 fsl-ls1028a-kontron-sl28-var3-ads2.dts(2.16 KB)
📄 fsl-ls1028a-kontron-sl28-var4.dts(1.05 KB)
📄 fsl-ls1028a-kontron-sl28.dts(2.9 KB)
📄 fsl-ls1028a-qds.dts(5.28 KB)
📄 fsl-ls1028a-rdb.dts(4.34 KB)
📄 fsl-ls1028a.dtsi(29.05 KB)
📄 fsl-ls1043-post.dtsi(780 B)
📄 fsl-ls1043a-qds.dts(2.41 KB)
📄 fsl-ls1043a-rdb.dts(3.65 KB)
📄 fsl-ls1043a.dtsi(22.32 KB)
📄 fsl-ls1046-post.dtsi(825 B)
📄 fsl-ls1046a-frwy.dts(2.51 KB)
📄 fsl-ls1046a-qds.dts(2.83 KB)
📄 fsl-ls1046a-rdb.dts(2.83 KB)
📄 fsl-ls1046a.dtsi(22.83 KB)
📄 fsl-ls1088a-qds.dts(2.61 KB)
📄 fsl-ls1088a-rdb.dts(1.82 KB)
📄 fsl-ls1088a.dtsi(22.01 KB)
📄 fsl-ls2080a-qds.dts(512 B)
📄 fsl-ls2080a-rdb.dts(507 B)
📄 fsl-ls2080a-simu.dts(542 B)
📄 fsl-ls2080a.dtsi(3.72 KB)
📄 fsl-ls2088a-qds.dts(458 B)
📄 fsl-ls2088a-rdb.dts(458 B)
📄 fsl-ls2088a.dtsi(3.61 KB)
📄 fsl-ls208xa-qds.dtsi(2.6 KB)
📄 fsl-ls208xa-rdb.dtsi(1.96 KB)
📄 fsl-ls208xa.dtsi(20.25 KB)
📄 fsl-lx2160a-cex7.dtsi(2.39 KB)
📄 fsl-lx2160a-clearfog-cx.dts(315 B)
📄 fsl-lx2160a-clearfog-itx.dtsi(692 B)
📄 fsl-lx2160a-honeycomb.dts(309 B)
📄 fsl-lx2160a-qds.dts(2.45 KB)
📄 fsl-lx2160a-rdb.dts(2.66 KB)
📄 fsl-lx2160a.dtsi(37.57 KB)
📄 imx8mm-beacon-baseboard.dtsi(6.28 KB)
📄 imx8mm-beacon-kit.dts(374 B)
📄 imx8mm-beacon-som.dtsi(9.83 KB)
📄 imx8mm-evk.dts(12.52 KB)
📄 imx8mm-pinfunc.h(63.02 KB)
📄 imx8mm.dtsi(27.25 KB)
📄 imx8mn-ddr4-evk.dts(3.12 KB)
📄 imx8mn-evk.dts(2.54 KB)
📄 imx8mn-evk.dtsi(8.1 KB)
📄 imx8mn-pinfunc.h(64.97 KB)
📄 imx8mn.dtsi(23.93 KB)
📄 imx8mp-evk.dts(6.75 KB)
📄 imx8mp-pinfunc.h(85.33 KB)
📄 imx8mp.dtsi(19.92 KB)
📄 imx8mq-evk.dts(11.98 KB)
📄 imx8mq-hummingboard-pulse.dts(5.94 KB)
📄 imx8mq-librem5-devkit.dts(21.7 KB)
📄 imx8mq-nitrogen.dts(10.51 KB)
📄 imx8mq-phanbell.dts(10.84 KB)
📄 imx8mq-pico-pi.dts(9.96 KB)
📄 imx8mq-pinfunc.h(60.77 KB)
📄 imx8mq-sr-som.dtsi(7.5 KB)
📄 imx8mq-thor96.dts(12.86 KB)
📄 imx8mq-zii-ultra-rmb3.dts(1.72 KB)
📄 imx8mq-zii-ultra-zest.dts(473 B)
📄 imx8mq-zii-ultra.dtsi(16.29 KB)
📄 imx8mq.dtsi(36.02 KB)
📄 imx8qxp-ai_ml.dts(5.86 KB)
📄 imx8qxp-colibri-eval-v3.dts(333 B)
📄 imx8qxp-colibri-eval-v3.dtsi(895 B)
📄 imx8qxp-colibri.dtsi(18.2 KB)
📄 imx8qxp-mek.dts(5.97 KB)
📄 imx8qxp.dtsi(16.6 KB)
📄 qoriq-bman-portals.dtsi(1.87 KB)
📄 qoriq-fman3-0-10g-0.dtsi(845 B)
📄 qoriq-fman3-0-10g-1.dtsi(845 B)
📄 qoriq-fman3-0-1g-0.dtsi(828 B)
📄 qoriq-fman3-0-1g-1.dtsi(828 B)
📄 qoriq-fman3-0-1g-2.dtsi(828 B)
📄 qoriq-fman3-0-1g-3.dtsi(828 B)
📄 qoriq-fman3-0-1g-4.dtsi(828 B)
📄 qoriq-fman3-0-1g-5.dtsi(828 B)
📄 qoriq-fman3-0.dtsi(1.8 KB)
📄 qoriq-qman-portals.dtsi(2.16 KB)
📄 s32v234-evb.dts(371 B)
📄 s32v234.dtsi(3.13 KB)

Editing: fsl-ls1028a-rdb.dts

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for NXP LS1028A RDB Board.
 *
 * Copyright 2018 NXP
 *
 * Harninder Rai <harninder.rai@nxp.com>
 *
 */

/dts-v1/;
#include "fsl-ls1028a.dtsi"

/ {
	model = "LS1028A RDB Board";
	compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";

aliases {
		crypto = &crypto;
		serial0 = &duart0;
		serial1 = &duart1;
	};

chosen {
		stdout-path = "serial0:115200n8";
	};

memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x1 0x0000000>;
	};

sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <25000000>;
	};

reg_1p8v: regulator-1p8v {
		compatible = "regulator-fixed";
		regulator-name = "1P8V";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
	};

sb_3v3: regulator-sb3v3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3_vbus";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Ext",
			"Line", "Line In Jack";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"Microphone Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"Speaker Ext", "LINE_OUT";

simple-audio-card,cpu {
			sound-dai = <&sai4>;
			frame-master;
			bitclock-master;
		};

simple-audio-card,codec {
			sound-dai = <&sgtl5000>;
			frame-master;
			bitclock-master;
			system-clock-frequency = <25000000>;
		};
	};
};

&esdhc {
	sd-uhs-sdr104;
	sd-uhs-sdr50;
	sd-uhs-sdr25;
	sd-uhs-sdr12;
	status = "okay";
};

&esdhc1 {
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	bus-width = <8>;
	status = "okay";
};

&fspi {
	status = "okay";

mt35xu02g0: flash@0 {
		compatible = "jedec,spi-nor";
		#address-cells = <1>;
		#size-cells = <1>;
		spi-max-frequency = <50000000>;
		/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
		spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
		spi-tx-bus-width = <1>; /* 1 SPI Tx line */
		reg = <0>;
	};
};

&i2c0 {
	status = "okay";

i2c-mux@77 {
		compatible = "nxp,pca9847";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;

i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x1>;

sgtl5000: audio-codec@a {
				#sound-dai-cells = <0>;
				compatible = "fsl,sgtl5000";
				reg = <0xa>;
				VDDA-supply = <&reg_1p8v>;
				VDDIO-supply = <&reg_1p8v>;
				clocks = <&sys_mclk>;
				sclk-strength = <3>;
			};
		};

i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x02>;

current-monitor@40 {
				compatible = "ti,ina220";
				reg = <0x40>;
				shunt-resistor = <500>;
			};
		};

i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x3>;

temperature-sensor@4c {
				compatible = "nxp,sa56004";
				reg = <0x4c>;
				vcc-supply = <&sb_3v3>;
			};

rtc@51 {
				compatible = "nxp,pcf2129";
				reg = <0x51>;
			};
		};
	};
};

&duart0 {
	status = "okay";
};

&duart1 {
	status = "okay";
};

&enetc_mdio_pf3 {
	/* VSC8514 QSGMII quad PHY */
	qsgmii_phy0: ethernet-phy@10 {
		reg = <0x10>;
	};

qsgmii_phy1: ethernet-phy@11 {
		reg = <0x11>;
	};

qsgmii_phy2: ethernet-phy@12 {
		reg = <0x12>;
	};

qsgmii_phy3: ethernet-phy@13 {
		reg = <0x13>;
	};
};

&enetc_port0 {
	phy-handle = <&sgmii_phy0>;
	phy-connection-type = "sgmii";
	status = "okay";

mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		sgmii_phy0: ethernet-phy@2 {
			reg = <0x2>;
		};
	};
};

&enetc_port2 {
	status = "okay";
};

&mscc_felix {
	status = "okay";
};

&mscc_felix_port0 {
	label = "swp0";
	managed = "in-band-status";
	phy-handle = <&qsgmii_phy0>;
	phy-mode = "qsgmii";
	status = "okay";
};

&mscc_felix_port1 {
	label = "swp1";
	managed = "in-band-status";
	phy-handle = <&qsgmii_phy1>;
	phy-mode = "qsgmii";
	status = "okay";
};

&mscc_felix_port2 {
	label = "swp2";
	managed = "in-band-status";
	phy-handle = <&qsgmii_phy2>;
	phy-mode = "qsgmii";
	status = "okay";
};

&mscc_felix_port3 {
	label = "swp3";
	managed = "in-band-status";
	phy-handle = <&qsgmii_phy3>;
	phy-mode = "qsgmii";
	status = "okay";
};

&mscc_felix_port4 {
	ethernet = <&enetc_port2>;
	status = "okay";
};

&sai4 {
	status = "okay";
};

&sata {
	status = "okay";
};

&usb1 {
	dr_mode = "otg";
};

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Editing: fsl-ls1028a-rdb.dts

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