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usr / src / sys / contrib / device-tree / src / arm64 / freescale /

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📄 fsl-ls1012a-frdm.dts(1.77 KB)
📄 fsl-ls1012a-frwy.dts(619 B)
📄 fsl-ls1012a-oxalis.dts(1.61 KB)
📄 fsl-ls1012a-qds.dts(2.57 KB)
📄 fsl-ls1012a-rdb.dts(771 B)
📄 fsl-ls1012a.dtsi(13.52 KB)
📄 fsl-ls1028a-kontron-kbox-a-230-ls.dts(1.46 KB)
📄 fsl-ls1028a-kontron-sl28-var2.dts(1.34 KB)
📄 fsl-ls1028a-kontron-sl28-var3-ads2.dts(2.16 KB)
📄 fsl-ls1028a-kontron-sl28-var4.dts(1.05 KB)
📄 fsl-ls1028a-kontron-sl28.dts(2.9 KB)
📄 fsl-ls1028a-qds.dts(5.28 KB)
📄 fsl-ls1028a-rdb.dts(4.34 KB)
📄 fsl-ls1028a.dtsi(29.05 KB)
📄 fsl-ls1043-post.dtsi(780 B)
📄 fsl-ls1043a-qds.dts(2.41 KB)
📄 fsl-ls1043a-rdb.dts(3.65 KB)
📄 fsl-ls1043a.dtsi(22.32 KB)
📄 fsl-ls1046-post.dtsi(825 B)
📄 fsl-ls1046a-frwy.dts(2.51 KB)
📄 fsl-ls1046a-qds.dts(2.83 KB)
📄 fsl-ls1046a-rdb.dts(2.83 KB)
📄 fsl-ls1046a.dtsi(22.83 KB)
📄 fsl-ls1088a-qds.dts(2.61 KB)
📄 fsl-ls1088a-rdb.dts(1.82 KB)
📄 fsl-ls1088a.dtsi(22.01 KB)
📄 fsl-ls2080a-qds.dts(512 B)
📄 fsl-ls2080a-rdb.dts(507 B)
📄 fsl-ls2080a-simu.dts(542 B)
📄 fsl-ls2080a.dtsi(3.72 KB)
📄 fsl-ls2088a-qds.dts(458 B)
📄 fsl-ls2088a-rdb.dts(458 B)
📄 fsl-ls2088a.dtsi(3.61 KB)
📄 fsl-ls208xa-qds.dtsi(2.6 KB)
📄 fsl-ls208xa-rdb.dtsi(1.96 KB)
📄 fsl-ls208xa.dtsi(20.25 KB)
📄 fsl-lx2160a-cex7.dtsi(2.39 KB)
📄 fsl-lx2160a-clearfog-cx.dts(315 B)
📄 fsl-lx2160a-clearfog-itx.dtsi(692 B)
📄 fsl-lx2160a-honeycomb.dts(309 B)
📄 fsl-lx2160a-qds.dts(2.45 KB)
📄 fsl-lx2160a-rdb.dts(2.66 KB)
📄 fsl-lx2160a.dtsi(37.57 KB)
📄 imx8mm-beacon-baseboard.dtsi(6.28 KB)
📄 imx8mm-beacon-kit.dts(374 B)
📄 imx8mm-beacon-som.dtsi(9.83 KB)
📄 imx8mm-evk.dts(12.52 KB)
📄 imx8mm-pinfunc.h(63.02 KB)
📄 imx8mm.dtsi(27.25 KB)
📄 imx8mn-ddr4-evk.dts(3.12 KB)
📄 imx8mn-evk.dts(2.54 KB)
📄 imx8mn-evk.dtsi(8.1 KB)
📄 imx8mn-pinfunc.h(64.97 KB)
📄 imx8mn.dtsi(23.93 KB)
📄 imx8mp-evk.dts(6.75 KB)
📄 imx8mp-pinfunc.h(85.33 KB)
📄 imx8mp.dtsi(19.92 KB)
📄 imx8mq-evk.dts(11.98 KB)
📄 imx8mq-hummingboard-pulse.dts(5.94 KB)
📄 imx8mq-librem5-devkit.dts(21.7 KB)
📄 imx8mq-nitrogen.dts(10.51 KB)
📄 imx8mq-phanbell.dts(10.84 KB)
📄 imx8mq-pico-pi.dts(9.96 KB)
📄 imx8mq-pinfunc.h(60.77 KB)
📄 imx8mq-sr-som.dtsi(7.5 KB)
📄 imx8mq-thor96.dts(12.86 KB)
📄 imx8mq-zii-ultra-rmb3.dts(1.72 KB)
📄 imx8mq-zii-ultra-zest.dts(473 B)
📄 imx8mq-zii-ultra.dtsi(16.29 KB)
📄 imx8mq.dtsi(36.02 KB)
📄 imx8qxp-ai_ml.dts(5.86 KB)
📄 imx8qxp-colibri-eval-v3.dts(333 B)
📄 imx8qxp-colibri-eval-v3.dtsi(895 B)
📄 imx8qxp-colibri.dtsi(18.2 KB)
📄 imx8qxp-mek.dts(5.97 KB)
📄 imx8qxp.dtsi(16.6 KB)
📄 qoriq-bman-portals.dtsi(1.87 KB)
📄 qoriq-fman3-0-10g-0.dtsi(845 B)
📄 qoriq-fman3-0-10g-1.dtsi(845 B)
📄 qoriq-fman3-0-1g-0.dtsi(828 B)
📄 qoriq-fman3-0-1g-1.dtsi(828 B)
📄 qoriq-fman3-0-1g-2.dtsi(828 B)
📄 qoriq-fman3-0-1g-3.dtsi(828 B)
📄 qoriq-fman3-0-1g-4.dtsi(828 B)
📄 qoriq-fman3-0-1g-5.dtsi(828 B)
📄 qoriq-fman3-0.dtsi(1.8 KB)
📄 qoriq-qman-portals.dtsi(2.16 KB)
📄 s32v234-evb.dts(371 B)
📄 s32v234.dtsi(3.13 KB)

Editing: imx8qxp-mek.dts

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2017~2018 NXP
 */

/dts-v1/;

#include "imx8qxp.dtsi"

/ {
	model = "Freescale i.MX8QXP MEK";
	compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";

chosen {
		stdout-path = &adma_lpuart0;
	};

memory@80000000 {
		device_type = "memory";
		reg = <0x00000000 0x80000000 0 0x40000000>;
	};

reg_usdhc2_vmmc: usdhc2-vmmc {
		compatible = "regulator-fixed";
		regulator-name = "SD1_SPWR";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
		gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&adma_dsp {
	status = "okay";
};

&adma_i2c1 {
	#address-cells = <1>;
	#size-cells = <0>;
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>;
	status = "okay";

i2c-switch@71 {
		compatible = "nxp,pca9646", "nxp,pca9546";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x71>;
		reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>;

i2c@0 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0>;

max7322: gpio@68 {
				compatible = "maxim,max7322";
				reg = <0x68>;
				gpio-controller;
				#gpio-cells = <2>;
			};
		};

i2c@1 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <1>;
		};

i2c@2 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <2>;

pressure-sensor@60 {
				compatible = "fsl,mpl3115";
				reg = <0x60>;
			};
		};

i2c@3 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <3>;

pca9557_a: gpio@1a {
				compatible = "nxp,pca9557";
				reg = <0x1a>;
				gpio-controller;
				#gpio-cells = <2>;
			};

pca9557_b: gpio@1d {
				compatible = "nxp,pca9557";
				reg = <0x1d>;
				gpio-controller;
				#gpio-cells = <2>;
			};

light-sensor@44 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_isl29023>;
				compatible = "isil,isl29023";
				reg = <0x44>;
				interrupt-parent = <&lsio_gpio1>;
				interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
			};
		};
	};
};

&adma_lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_lpuart0>;
	status = "okay";
};

&fec1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_fec1>;
	phy-mode = "rgmii-id";
	phy-handle = <&ethphy0>;
	fsl,magic-packet;
	status = "okay";

mdio {
		#address-cells = <1>;
		#size-cells = <0>;

ethphy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
		};
	};
};

&scu_key {
	status = "okay";
};

&thermal_zones {
	pmic-thermal0 {
		polling-delay-passive = <250>;
		polling-delay = <2000>;
		thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;

trips {
			pmic_alert0: trip0 {
				temperature = <110000>;
				hysteresis = <2000>;
				type = "passive";
			};

pmic_crit0: trip1 {
				temperature = <125000>;
				hysteresis = <2000>;
				type = "critical";
			};
		};

cooling-maps {
			map0 {
				trip = <&pmic_alert0>;
				cooling-device =
					<&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
					<&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
			};
		};
	};
};

&usdhc1 {
	assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
	assigned-clock-rates = <200000000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <8>;
	no-sd;
	no-sdio;
	non-removable;
	status = "okay";
};

&usdhc2 {
	assigned-clocks = <&clk IMX_CONN_SDHC1_CLK>;
	assigned-clock-rates = <200000000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc2>;
	bus-width = <4>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
	wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&iomuxc {
	pinctrl_fec1: fec1grp {
		fsl,pins = <
			IMX8QXP_ENET0_MDC_CONN_ENET0_MDC			0x06000020
			IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO			0x06000020
			IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL	0x06000020
			IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC		0x06000020
			IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0		0x06000020
			IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1		0x06000020
			IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2		0x06000020
			IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3		0x06000020
			IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC		0x06000020
			IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL	0x06000020
			IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0		0x06000020
			IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1		0x06000020
			IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2		0x06000020
			IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3		0x06000020
		>;
	};

pinctrl_ioexp_rst: ioexprstgrp {
		fsl,pins = <
			IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01			0x06000021
		>;
	};

pinctrl_isl29023: isl29023grp {
		fsl,pins = <
			IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02			0x00000021
		>;
	};

pinctrl_lpi2c1: lpi2c1grp {
		fsl,pins = <
			IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL			0x06000021
			IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA			0x06000021
		>;
	};

pinctrl_lpuart0: lpuart0grp {
		fsl,pins = <
			IMX8QXP_UART0_RX_ADMA_UART0_RX				0x06000020
			IMX8QXP_UART0_TX_ADMA_UART0_TX				0x06000020
		>;
	};

pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK			0x06000041
			IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD			0x00000021
			IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0			0x00000021
			IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1			0x00000021
			IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2			0x00000021
			IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3			0x00000021
			IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4			0x00000021
			IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5			0x00000021
			IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6			0x00000021
			IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7			0x00000021
			IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE			0x00000041
		>;
	};

pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK			0x06000041
			IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD			0x00000021
			IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0			0x00000021
			IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1			0x00000021
			IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2			0x00000021
			IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3			0x00000021
			IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT		0x00000021
		>;
	};
};

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Editing: imx8qxp-mek.dts

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