003 File Manager
Current Path:
/usr/src/sys/mips/ingenic
usr
/
src
/
sys
/
mips
/
ingenic
/
📁
..
📄
files.jz4780
(1.22 KB)
📄
files.x1000
(653 B)
📄
jz4780_aic.c
(16.34 KB)
📄
jz4780_aic.h
(3.86 KB)
📄
jz4780_clk.h
(3.39 KB)
📄
jz4780_clk_gen.c
(8.48 KB)
📄
jz4780_clk_otg.c
(4.42 KB)
📄
jz4780_clk_pll.c
(5.84 KB)
📄
jz4780_clock.c
(20.19 KB)
📄
jz4780_clock.h
(1.52 KB)
📄
jz4780_codec.c
(8.15 KB)
📄
jz4780_codec.h
(5.32 KB)
📄
jz4780_common.h
(1.72 KB)
📄
jz4780_cpuregs.h
(3.04 KB)
📄
jz4780_dme.c
(3.28 KB)
📄
jz4780_dwc_fdt.c
(5.13 KB)
📄
jz4780_efuse.c
(5.48 KB)
📄
jz4780_ehci.c
(8.31 KB)
📄
jz4780_gpio.c
(20.2 KB)
📄
jz4780_gpio_if.m
(1.53 KB)
📄
jz4780_intr.c
(8.03 KB)
📄
jz4780_lcd.c
(13.77 KB)
📄
jz4780_lcd.h
(6.31 KB)
📄
jz4780_machdep.c
(6 KB)
📄
jz4780_mmc.c
(25.45 KB)
📄
jz4780_mp.c
(4.21 KB)
📄
jz4780_mpboot.S
(1.62 KB)
📄
jz4780_nand.c
(3.28 KB)
📄
jz4780_nemc.c
(10.2 KB)
📄
jz4780_ohci.c
(8.4 KB)
📄
jz4780_pdma.c
(12.54 KB)
📄
jz4780_pdma.h
(5.12 KB)
📄
jz4780_pinctrl.c
(6.51 KB)
📄
jz4780_pinctrl.h
(1.48 KB)
📄
jz4780_regs.h
(30.75 KB)
📄
jz4780_rtc.c
(5.57 KB)
📄
jz4780_smb.c
(11.34 KB)
📄
jz4780_smb.h
(3.06 KB)
📄
jz4780_timer.c
(8.61 KB)
📄
jz4780_uart.c
(5.83 KB)
Editing: jz4780_cpuregs.h
/*- * Copyright (c) 2015 Alexander Kabaev <kan@FreeBSD.org> * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #ifndef JZ4780_CPUREGS_H #define JZ4780_CPUREGS_H /* Core control register */ #define JZ_CORECTL_SLP1M_SHIFT 17 #define JZ_CORECTL_SLP1M (1u << JZ_CORECTL_SLP1M_SHIFT) #define JZ_CORECTL_SLP0M_SHIFT 16 #define JZ_CORECTL_SLP0M (1u << JZ_CORECTL_SLP0M_SHIFT) #define JZ_CORECTL_RPC1_SHIFT 9 #define JZ_CORECTL_RPC1 (1u << JZ_CORECTL_RPC1_SHIFT) #define JZ_CORECTL_RPC0_SHIFT 8 #define JZ_CORECTL_RPC0 (1u << JZ_CORECTL_RPC0_SHIFT) #define JZ_CORECTL_SWRST1_SHIFT 1 #define JZ_CORECTL_SWRST1 (1u << JZ_CORECTL_SWRST1_SHIFT) #define JZ_CORECTL_SWRST0_SHIFT 0 #define JZ_CORECTL_SWRST0 (1u << JZ_CORECTL_SWRST0_SHIFT) /* Core status register */ #define JZ_CORESTS_SLP1_SHIFT 17 #define JZ_CORESTS_SLP1 (1u << JZ_CORESTS_SLP1_SHIFT) #define JZ_CORESTS_SLP0_SHIFT 16 #define JZ_CORESTS_SLP0 (1u << JZ_CORESTS_SLP0_SHIFT) #define JZ_CORESTS_IRQ1P_SHIFT 9 #define JZ_CORESTS_IRQ1P (1u << JZ_CORESTS_IRQ1P_SHIFT) #define JZ_CORESTS_IRQ0P_SHIFT 8 #define JZ_CORESTS_IRQ0P (1u << JZ_CORESTS_IRQ0P_SHIFT) #define JZ_CORESTS_MIRQ1P_SHIFT 1 #define JZ_CORESTS_MIRQ1P (1u << JZ_CORESTS_MIRQ1P_SHIFT) #define JZ_CORESTS_MIRQ0P_SHIFT 0 #define JZ_CORESTS_MIRQ0P (1u << JZ_CORESTS_MIRQ0P_SHIFT) /* Reset entry and IRQ mask */ #define JZ_REIM_ENTRY_SHIFT 16 #define JZ_REIM_ENTRY_WIDTH 16 #define JZ_REIM_ENTRY_MASK (0xFFFFu << JZ_REIM_ENTRY_SHIFT) #define JZ_REIM_IRQ1M_SHIFT 9 #define JZ_REIM_IRQ1M (1u << JZ_REIM_IRQ1M_SHIFT) #define JZ_REIM_IRQ0M_SHIFT 8 #define JZ_REIM_IRQ0M (1u << JZ_REIM_IRQ0M_SHIFT) #define JZ_REIM_MIRQ1M_SHIFT 1 #define JZ_REIM_MIRQ1M (1u << JZ_REIM_MIRQ1M_SHIFT) #define JZ_REIM_MIRQ0M_SHIFT 0 #define JZ_REIM_MIRQ0M (1u << JZ_REIM_MIRQ0M_SHIFT) #endif /* JZ4780_CPUREGS_H */
Upload File
Create Folder