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usr / src / sys / contrib / device-tree / Bindings / powerpc / fsl /

📁 ..
📄 cache_sram.txt(559 B)
📄 ccf.txt(1.37 KB)
📄 cpus.txt(1.43 KB)
📄 dcsr.txt(10.72 KB)
📄 diu.txt(847 B)
📄 dma.txt(6.56 KB)
📄 ecm.txt(1.81 KB)
📄 interlaken-lac.txt(8.59 KB)
📄 l2cache.txt(2.03 KB)
📄 lbc.txt(1.11 KB)
📄 mcm.txt(1.81 KB)
📄 mcu-mpc8349emitx.txt(428 B)
📄 mpc5121-psc.txt(2.4 KB)
📄 mpc512x_lpbfifo.txt(669 B)
📄 mpc5200.txt(8.6 KB)
📄 mpic-msgr.txt(2.35 KB)
📄 mpic-timer.txt(1.14 KB)
📄 mpic.txt(7.33 KB)
📄 msi-pic.txt(4.38 KB)
📄 pamu.txt(4.78 KB)
📄 pmc.txt(2.48 KB)
📄 raideng.txt(2.47 KB)
📄 scfg.txt(451 B)
📄 srio-rmu.txt(5.12 KB)
📄 srio.txt(3.34 KB)

Editing: lbc.txt

* Chipselect/Local Bus

Properties:
- name : Should be localbus
- #address-cells : Should be either two or three.  The first cell is the
                   chipselect number, and the remaining cells are the
                   offset into the chipselect.
- #size-cells : Either one or two, depending on how large each chipselect
                can be.
- ranges : Each range corresponds to a single chipselect, and cover
           the entire access window as configured.

Example:
	localbus@f0010100 {
		compatible = "fsl,mpc8272-localbus",
			   "fsl,pq2-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <0xf0010100 0x40>;

ranges = <0x0 0x0 0xfe000000 0x02000000
			  0x1 0x0 0xf4500000 0x00008000
			  0x2 0x0 0xfd810000 0x00010000>;

flash@0,0 {
			compatible = "jedec-flash";
			reg = <0x0 0x0 0x2000000>;
			bank-width = <4>;
			device-width = <1>;
		};

board-control@1,0 {
			reg = <0x1 0x0 0x20>;
			compatible = "fsl,mpc8272ads-bcsr";
		};

simple-periph@2,0 {
			compatible = "fsl,elbc-gpcm-uio";
			reg = <0x2 0x0 0x10000>;
			elbc-gpcm-br = <0xfd810800>;
			elbc-gpcm-or = <0xffff09f7>;
		};
	};

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Editing: lbc.txt

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