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counter.txt
(412 B)
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crossbar.txt
(2.15 KB)
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ctrl.txt
(1.92 KB)
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dmm.txt
(892 B)
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dsp.txt
(239 B)
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iva.txt
(400 B)
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l3-noc.txt
(719 B)
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l4.txt
(1.5 KB)
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mpu.txt
(1.16 KB)
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omap.txt
(7.03 KB)
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prcm.txt
(1.31 KB)
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prm-inst.txt
(794 B)
Editing: mpu.txt
* TI - MPU (Main Processor Unit) subsystem The MPU subsystem contain one or several ARM cores depending of the version. The MPU contain CPUs, GIC, L2 cache and a local PRCM. Required properties: - compatible : Should be "ti,omap3-mpu" for OMAP3 Should be "ti,omap4-mpu" for OMAP4 Should be "ti,omap5-mpu" for OMAP5 - ti,hwmods: "mpu" Optional properties: - sram: Phandle to the ocmcram node am335x and am437x only: - pm-sram: Phandles to ocmcram nodes to be used for power management. First should be type 'protect-exec' for the driver to use to copy and run PM functions, second should be regular pool to be used for data region for code. See Documentation/devicetree/bindings/sram/sram.yaml for more details. Examples: - For an OMAP5 SMP system: mpu { compatible = "ti,omap5-mpu"; ti,hwmods = "mpu" }; - For an OMAP4 SMP system: mpu { compatible = "ti,omap4-mpu"; ti,hwmods = "mpu"; }; - For an OMAP3 monocore system: mpu { compatible = "ti,omap3-mpu"; ti,hwmods = "mpu"; }; - For an AM335x system: mpu { compatible = "ti,omap3-mpu"; ti,hwmods = "mpu"; pm-sram = <&pm_sram_code &pm_sram_data>; };
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