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ivybridge
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cache.json
(41.53 KB)
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floating-point.json
(6.25 KB)
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frontend.json
(12.95 KB)
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ivb-metrics.json
(21.49 KB)
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memory.json
(8.05 KB)
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other.json
(1.66 KB)
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pipeline.json
(50.41 KB)
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uncore.json
(10.9 KB)
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virtual-memory.json
(7.34 KB)
Editing: other.json
[ { "PublicDescription": "Unhalted core cycles when the thread is in ring 0.", "EventCode": "0x5C", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "CPL_CYCLES.RING0", "SampleAfterValue": "2000003", "BriefDescription": "Unhalted core cycles when the thread is in ring 0", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Number of intervals between processor halts while thread is in ring 0.", "EventCode": "0x5C", "Counter": "0,1,2,3", "UMask": "0x1", "EdgeDetect": "1", "EventName": "CPL_CYCLES.RING0_TRANS", "SampleAfterValue": "100007", "BriefDescription": "Number of intervals between processor halts while thread is in ring 0", "CounterMask": "1", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Unhalted core cycles when the thread is not in ring 0.", "EventCode": "0x5C", "Counter": "0,1,2,3", "UMask": "0x2", "EventName": "CPL_CYCLES.RING123", "SampleAfterValue": "2000003", "BriefDescription": "Unhalted core cycles when thread is in rings 1, 2, or 3", "CounterHTOff": "0,1,2,3,4,5,6,7" }, { "PublicDescription": "Cycles in which the L1D and L2 are locked, due to a UC lock or split lock.", "EventCode": "0x63", "Counter": "0,1,2,3", "UMask": "0x1", "EventName": "LOCK_CYCLES.SPLIT_LOCK_UC_LOCK_DURATION", "SampleAfterValue": "2000003", "BriefDescription": "Cycles when L1 and L2 are locked due to UC or split lock", "CounterHTOff": "0,1,2,3,4,5,6,7" } ]
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