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_align.h
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_bus.h
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_inttypes.h
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_limits.h
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_stdint.h
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_types.h
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asm.h
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atomic.h
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bus.h
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bus_dma.h
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bus_dma_impl.h
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clock.h
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counter.h
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cpu.h
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cpufunc.h
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db_machdep.h
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dump.h
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efi.h
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elf.h
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encoding.h
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endian.h
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exec.h
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float.h
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floatingpoint.h
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fpe.h
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frame.h
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ieeefp.h
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in_cksum.h
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intr.h
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kdb.h
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machdep.h
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md_var.h
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memdev.h
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metadata.h
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minidump.h
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ofw_machdep.h
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param.h
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pcb.h
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pcpu.h
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pcpu_aux.h
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pmap.h
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pmc_mdep.h
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proc.h
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procctl.h
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profile.h
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psl.h
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pte.h
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ptrace.h
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reg.h
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reloc.h
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resource.h
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riscvreg.h
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runq.h
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sbi.h
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setjmp.h
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sf_buf.h
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sigframe.h
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signal.h
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smp.h
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stack.h
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stdarg.h
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sysarch.h
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trap.h
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ucontext.h
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vdso.h
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vm.h
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vmparam.h
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Editing: pte.h
/*- * Copyright (c) 2014 Andrew Turner * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com> * All rights reserved. * * Portions of this software were developed by SRI International and the * University of Cambridge Computer Laboratory under DARPA/AFRL contract * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. * * Portions of this software were developed by the University of Cambridge * Computer Laboratory as part of the CTSRD Project, with support from the * UK Higher Education Innovation Fund (HEIF). * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _MACHINE_PTE_H_ #define _MACHINE_PTE_H_ #ifndef LOCORE typedef uint64_t pd_entry_t; /* page directory entry */ typedef uint64_t pt_entry_t; /* page table entry */ typedef uint64_t pn_t; /* page number */ #endif /* Level 0 table, 512GiB per entry */ #define L0_SHIFT 39 /* Level 1 table, 1GiB per entry */ #define L1_SHIFT 30 #define L1_SIZE (1 << L1_SHIFT) #define L1_OFFSET (L1_SIZE - 1) /* Level 2 table, 2MiB per entry */ #define L2_SHIFT 21 #define L2_SIZE (1 << L2_SHIFT) #define L2_OFFSET (L2_SIZE - 1) /* Level 3 table, 4KiB per entry */ #define L3_SHIFT 12 #define L3_SIZE (1 << L3_SHIFT) #define L3_OFFSET (L3_SIZE - 1) #define Ln_ENTRIES_SHIFT 9 #define Ln_ENTRIES (1 << Ln_ENTRIES_SHIFT) #define Ln_ADDR_MASK (Ln_ENTRIES - 1) /* Bits 9:8 are reserved for software */ #define PTE_SW_MANAGED (1 << 9) #define PTE_SW_WIRED (1 << 8) #define PTE_D (1 << 7) /* Dirty */ #define PTE_A (1 << 6) /* Accessed */ #define PTE_G (1 << 5) /* Global */ #define PTE_U (1 << 4) /* User */ #define PTE_X (1 << 3) /* Execute */ #define PTE_W (1 << 2) /* Write */ #define PTE_R (1 << 1) /* Read */ #define PTE_V (1 << 0) /* Valid */ #define PTE_RWX (PTE_R | PTE_W | PTE_X) #define PTE_RX (PTE_R | PTE_X) #define PTE_KERN (PTE_V | PTE_R | PTE_W | PTE_A | PTE_D) #define PTE_PROMOTE (PTE_V | PTE_RWX | PTE_D | PTE_A | PTE_G | PTE_U | \ PTE_SW_MANAGED | PTE_SW_WIRED) /* Bits 63 - 54 are reserved for future use. */ #define PTE_HI_MASK 0xFFC0000000000000ULL #define PTE_PPN0_S 10 #define PTE_PPN1_S 19 #define PTE_PPN2_S 28 #define PTE_PPN3_S 37 #define PTE_SIZE 8 #endif /* !_MACHINE_PTE_H_ */ /* End of pte.h */
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