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usr / src / sys / contrib / device-tree / src / arm64 / renesas /

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📄 aistarvision-mipi-adapter-2.1.dtsi(2.02 KB)
📄 beacon-renesom-baseboard.dtsi(13.39 KB)
📄 beacon-renesom-som.dtsi(5.68 KB)
📄 cat875.dtsi(1009 B)
📄 hihope-common.dtsi(5.78 KB)
📄 hihope-rev2.dtsi(1.56 KB)
📄 hihope-rev4.dtsi(2.81 KB)
📄 hihope-rzg2-ex-lvds.dtsi(846 B)
📄 hihope-rzg2-ex.dtsi(1.45 KB)
📄 r8a774a1-beacon-rzg2m-kit.dts(537 B)
📄 r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts(373 B)
📄 r8a774a1-hihope-rzg2m-ex.dts(494 B)
📄 r8a774a1-hihope-rzg2m-rev2-ex-idk-1110wr.dts(374 B)
📄 r8a774a1-hihope-rzg2m-rev2-ex.dts(502 B)
📄 r8a774a1-hihope-rzg2m-rev2.dts(819 B)
📄 r8a774a1-hihope-rzg2m.dts(813 B)
📄 r8a774a1.dtsi(75.58 KB)
📄 r8a774b1-hihope-rzg2n-ex-idk-1110wr.dts(378 B)
📄 r8a774b1-hihope-rzg2n-ex.dts(393 B)
📄 r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dts(379 B)
📄 r8a774b1-hihope-rzg2n-rev2-ex.dts(401 B)
📄 r8a774b1-hihope-rzg2n-rev2.dts(849 B)
📄 r8a774b1-hihope-rzg2n.dts(843 B)
📄 r8a774b1.dtsi(71.83 KB)
📄 r8a774c0-cat874.dts(7.1 KB)
📄 r8a774c0-ek874-idk-2121wr.dts(1.95 KB)
📄 r8a774c0-ek874-mipi-2.1.dts(1.37 KB)
📄 r8a774c0-ek874.dts(375 B)
📄 r8a774c0.dtsi(55.95 KB)
📄 r8a774e1-hihope-rzg2h-ex.dts(365 B)
📄 r8a774e1-hihope-rzg2h.dts(574 B)
📄 r8a774e1.dtsi(45.44 KB)
📄 r8a77950-salvator-x.dts(2.55 KB)
📄 r8a77950-ulcb-kf.dts(398 B)
📄 r8a77950-ulcb.dts(792 B)
📄 r8a77950.dtsi(5.95 KB)
📄 r8a77951-salvator-x.dts(2.55 KB)
📄 r8a77951-salvator-xs.dts(3.66 KB)
📄 r8a77951-ulcb-kf.dts(398 B)
📄 r8a77951-ulcb.dts(1.06 KB)
📄 r8a77951.dtsi(89.79 KB)
📄 r8a77960-salvator-x.dts(1.48 KB)
📄 r8a77960-salvator-xs.dts(1.51 KB)
📄 r8a77960-ulcb-kf.dts(398 B)
📄 r8a77960-ulcb.dts(836 B)
📄 r8a77960.dtsi(80.41 KB)
📄 r8a77961-salvator-xs.dts(690 B)
📄 r8a77961-ulcb.dts(673 B)
📄 r8a77961.dtsi(44.21 KB)
📄 r8a77965-salvator-x.dts(1.36 KB)
📄 r8a77965-salvator-xs.dts(1.63 KB)
📄 r8a77965-ulcb-kf.dts(402 B)
📄 r8a77965-ulcb.dts(748 B)
📄 r8a77965.dtsi(72.39 KB)
📄 r8a77970-eagle.dts(4.32 KB)
📄 r8a77970-v3msk.dts(4.96 KB)
📄 r8a77970.dtsi(33.43 KB)
📄 r8a77980-condor.dts(5.87 KB)
📄 r8a77980-v3hsk.dts(4.7 KB)
📄 r8a77980.dtsi(43.38 KB)
📄 r8a77990-ebisu.dts(13.34 KB)
📄 r8a77990.dtsi(55.25 KB)
📄 r8a77995-draak.dts(8.59 KB)
📄 r8a77995.dtsi(32.24 KB)
📄 rzg2-advantech-idk-1110wr-panel.dtsi(734 B)
📄 salvator-common.dtsi(15.95 KB)
📄 salvator-x.dtsi(505 B)
📄 salvator-xs.dtsi(530 B)
📄 ulcb-kf.dtsi(6.77 KB)
📄 ulcb.dtsi(8.81 KB)

Editing: r8a77980-v3hsk.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the V3H Starter Kit board
 *
 * Copyright (C) 2018 Renesas Electronics Corp.
 * Copyright (C) 2018 Cogent Embedded, Inc.
 */

/dts-v1/;
#include "r8a77980.dtsi"

/ {
	model = "Renesas V3H Starter Kit board";
	compatible = "renesas,v3hsk", "renesas,r8a77980";

aliases {
		serial0 = &scif0;
		ethernet0 = &gether;
	};

chosen {
		stdout-path = "serial0:115200n8";
	};

hdmi-out {
		compatible = "hdmi-connector";
		type = "a";

port {
			hdmi_con: endpoint {
				remote-endpoint = <&adv7511_out>;
			};
		};
	};

lvds-decoder {
		compatible = "thine,thc63lvd1024";
		vcc-supply = <&vcc3v3_d5>;

ports {
			#address-cells = <1>;
			#size-cells = <0>;

port@0 {
				reg = <0>;
				thc63lvd1024_in: endpoint {
					remote-endpoint = <&lvds0_out>;
				};
			};

port@2 {
				reg = <2>;
				thc63lvd1024_out: endpoint {
					remote-endpoint = <&adv7511_in>;
				};
			};
		};
	};

memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0 0x48000000 0 0x78000000>;
	};

osc1_clk: osc1-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <148500000>;
	};

vcc1v8_d4: regulator-0 {
		compatible = "regulator-fixed";
		regulator-name = "VCC1V8_D4";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
		regulator-always-on;
	};

vcc3v3_d5: regulator-1 {
		compatible = "regulator-fixed";
		regulator-name = "VCC3V3_D5";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&du {
	clocks = <&cpg CPG_MOD 724>,
		 <&osc1_clk>;
	clock-names = "du.0", "dclkin.0";
	status = "okay";
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&gether {
	pinctrl-0 = <&gether_pins>;
	pinctrl-names = "default";

phy-mode = "rgmii";
	phy-handle = <&phy0>;
	renesas,no-ether-link;
	status = "okay";

phy0: ethernet-phy@0 {
		reg = <0>;
		interrupt-parent = <&gpio4>;
		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
	};
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";

status = "okay";
	clock-frequency = <400000>;

hdmi@39 {
		compatible = "adi,adv7511w";
		#sound-dai-cells = <0>;
		reg = <0x39>;
		interrupt-parent = <&gpio1>;
		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
		avdd-supply = <&vcc1v8_d4>;
		dvdd-supply = <&vcc1v8_d4>;
		pvdd-supply = <&vcc1v8_d4>;
		bgvdd-supply = <&vcc1v8_d4>;
		dvdd-3v-supply = <&vcc3v3_d5>;

adi,input-depth = <8>;
		adi,input-colorspace = "rgb";
		adi,input-clock = "1x";

ports {
			#address-cells = <1>;
			#size-cells = <0>;

port@0 {
				reg = <0>;
				adv7511_in: endpoint {
					remote-endpoint = <&thc63lvd1024_out>;
				};
			};

port@1 {
				reg = <1>;
				adv7511_out: endpoint {
					remote-endpoint = <&hdmi_con>;
				};
			};
		};
	};
};

&lvds0 {
	status = "okay";

ports {
		port@1 {
			lvds0_out: endpoint {
				remote-endpoint = <&thc63lvd1024_in>;
			};
		};
	};
};

&pfc {
	gether_pins: gether {
		groups = "gether_mdio_a", "gether_rgmii",
			 "gether_txcrefclk", "gether_txcrefclk_mega";
		function = "gether";
	};

i2c0_pins: i2c0 {
		groups = "i2c0";
		function = "i2c0";
	};

qspi0_pins: qspi0 {
		groups = "qspi0_ctrl", "qspi0_data4";
		function = "qspi0";
	};

scif0_pins: scif0 {
		groups = "scif0_data";
		function = "scif0";
	};

scif_clk_pins: scif_clk {
		groups = "scif_clk_b";
		function = "scif_clk";
	};
};

&rpc {
	pinctrl-0 = <&qspi0_pins>;
	pinctrl-names = "default";

status = "okay";

flash@0 {
		compatible = "spansion,s25fs512s", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;
		spi-rx-bus-width = <4>;

partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

bootparam@0 {
				reg = <0x00000000 0x040000>;
				read-only;
			};
			cr7@40000 {
				reg = <0x00040000 0x080000>;
				read-only;
			};
			cert_header_sa3@c0000 {
				reg = <0x000c0000 0x080000>;
				read-only;
			};
			bl2@140000 {
				reg = <0x00140000 0x040000>;
				read-only;
			};
			cert_header_sa6@180000 {
				reg = <0x00180000 0x040000>;
				read-only;
			};
			bl31@1c0000 {
				reg = <0x001c0000 0x460000>;
				read-only;
			};
			uboot@640000 {
				reg = <0x00640000 0x0c0000>;
				read-only;
			};
			uboot-env@700000 {
				reg = <0x00700000 0x040000>;
				read-only;
			};
			dtb@740000 {
				reg = <0x00740000 0x080000>;
			};
			kernel@7c0000 {
				reg = <0x007c0000 0x1400000>;
			};
			user@1bc0000 {
				reg = <0x01bc0000 0x2440000>;
			};
		};
	};
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};

&scif0 {
	pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
	pinctrl-names = "default";

status = "okay";
};

&scif_clk {
	clock-frequency = <14745600>;
};

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Editing: r8a77980-v3hsk.dts

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