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acphy.c
(6.8 KB)
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acphyreg.h
(3.39 KB)
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amphy.c
(5.68 KB)
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amphyreg.h
(3.71 KB)
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atphy.c
(9.06 KB)
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atphyreg.h
(2.46 KB)
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axphy.c
(4.27 KB)
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bmtphy.c
(7.2 KB)
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bmtphyreg.h
(7.51 KB)
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brgphy.c
(32.55 KB)
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brgphyreg.h
(18.76 KB)
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ciphy.c
(9.45 KB)
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ciphyreg.h
(16.78 KB)
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e1000phy.c
(13.82 KB)
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e1000phyreg.h
(13.79 KB)
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gentbi.c
(7.33 KB)
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icsphy.c
(6.76 KB)
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icsphyreg.h
(4.99 KB)
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ip1000phy.c
(8.88 KB)
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ip1000phyreg.h
(6.73 KB)
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jmphy.c
(8.38 KB)
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jmphyreg.h
(4.07 KB)
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lxtphy.c
(7.35 KB)
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lxtphyreg.h
(3.64 KB)
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micphy.c
(9.27 KB)
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mii.c
(16.35 KB)
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mii.h
(10.3 KB)
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mii_bitbang.c
(4.46 KB)
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mii_bitbang.h
(2.36 KB)
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mii_fdt.c
(6.02 KB)
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mii_fdt.h
(2.9 KB)
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mii_physubr.c
(17.29 KB)
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miibus_if.m
(533 B)
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miidevs
(16.37 KB)
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miivar.h
(9.61 KB)
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nsgphy.c
(6.74 KB)
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nsgphyreg.h
(3.43 KB)
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nsphy.c
(9.02 KB)
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nsphyreg.h
(4.39 KB)
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nsphyter.c
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nsphyterreg.h
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pnaphy.c
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qsphy.c
(6.26 KB)
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qsphyreg.h
(3.74 KB)
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rdcphy.c
(5.91 KB)
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rdcphyreg.h
(2.67 KB)
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rgephy.c
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rgephyreg.h
(9.11 KB)
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rlphy.c
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rlswitch.c
(11.82 KB)
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smcphy.c
(6.26 KB)
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smscphy.c
(5.49 KB)
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tdkphy.c
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tdkphyreg.h
(2.67 KB)
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tiphy.h
(2.61 KB)
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truephy.c
(8.25 KB)
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truephyreg.h
(2.63 KB)
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ukphy.c
(4.79 KB)
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ukphy_subr.c
(4.26 KB)
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vscphy.c
(6.57 KB)
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xmphy.c
(6.98 KB)
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xmphyreg.h
(5.31 KB)
Editing: rdcphyreg.h
/*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2010, Pyun YongHyeon <yongari@FreeBSD.org> * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice unmodified, this list of conditions, and the following * disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ #ifndef _DEV_MII_RDCPHYREG_H_ #define _DEV_MII_RDCPHYREG_H_ #define MII_RDCPHY_DEBUG 0x11 #define DEBUG_JABBER_DIS 0x0040 #define DEBUG_LOOP_BACK_10MBPS 0x0400 #define MII_RDCPHY_CTRL 0x14 #define CTRL_SQE_ENB 0x0100 #define CTRL_NEG_POLARITY 0x0400 #define CTRL_AUTO_POLARITY 0x0800 #define CTRL_MDIXSEL_RX 0x2000 #define CTRL_MDIXSEL_TX 0x4000 #define CTRL_AUTO_MDIX_DIS 0x8000 #define MII_RDCPHY_CTRL2 0x15 #define CTRL2_LED_DUPLEX 0x0000 #define CTRL2_LED_DUPLEX_COL 0x0008 #define CTRL2_LED_ACT 0x0010 #define CTRL2_LED_SPEED_ACT 0x0018 #define CTRL2_LED_BLK_100MBPS_DIS 0x0020 #define CTRL2_LED_BLK_10MBPS_DIS 0x0040 #define CTRL2_LED_BLK_LINK_ACT_DIS 0x0080 #define CTRL2_SDT_THRESH_MASK 0x3E00 #define CTRL2_TIMING_ERR_SEL 0x4000 #define CTRL2_LED_BLK_80MS 0x8000 #define CTRL2_LED_BLK_160MS 0x0000 #define CTRL2_LED_MASK 0x0018 #define MII_RDCPHY_STATUS 0x16 #define STATUS_AUTO_MDIX_RX 0x0200 #define STATUS_AUTO_MDIX_TX 0x0400 #define STATUS_NEG_POLARITY 0x0800 #define STATUS_FULL_DUPLEX 0x1000 #define STATUS_SPEED_10 0x0000 #define STATUS_SPEED_100 0x2000 #define STATUS_SPEED_MASK 0x6000 #define STATUS_LINK_UP 0x8000 /* Analog test register 2 */ #define MII_RDCPHY_TEST2 0x1A #define TEST2_PWR_DOWN 0x0200 #endif /* _DEV_MII_RDCPHYREG_H_ */
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