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pinctrl
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am33xx.h
(5.57 KB)
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am43xx.h
(1.72 KB)
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at91.h
(1.46 KB)
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bcm2835.h
(670 B)
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brcm,pinctrl-stingray.h
(2.65 KB)
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dm814x.h
(1.25 KB)
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dra.h
(2.49 KB)
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hisi.h
(2.02 KB)
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k3.h
(1.33 KB)
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keystone.h
(1.14 KB)
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lochnagar.h
(4.79 KB)
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mt6397-pinfunc.h
(13.12 KB)
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mt65xx.h
(815 B)
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mt6779-pinfunc.h
(59.94 KB)
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mt6797-pinfunc.h
(64.23 KB)
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mt7623-pinfunc.h
(31.66 KB)
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nomadik.h
(739 B)
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omap.h
(3.09 KB)
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pads-imx8dxl.h
(58.6 KB)
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pads-imx8qm.h
(55.56 KB)
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pads-imx8qxp.h
(68.28 KB)
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pinctrl-tegra-io-pad.h
(482 B)
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pinctrl-tegra-xusb.h
(240 B)
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pinctrl-tegra.h
(1.03 KB)
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qcom,pmic-gpio.h
(5.28 KB)
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qcom,pmic-mpp.h
(2.66 KB)
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r7s72100-pinctrl.h
(517 B)
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r7s9210-pinctrl.h
(1.1 KB)
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rockchip.h
(920 B)
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rzn1-pinctrl.h
(6.8 KB)
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samsung.h
(2.28 KB)
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stm32-pinfunc.h
(950 B)
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sun4i-a10.h
(2.54 KB)
Editing: samsung.h
/* SPDX-License-Identifier: GPL-2.0 */ /* * Samsung's Exynos pinctrl bindings * * Copyright (c) 2016 Samsung Electronics Co., Ltd. * http://www.samsung.com * Author: Krzysztof Kozlowski <krzk@kernel.org> */ #ifndef __DT_BINDINGS_PINCTRL_SAMSUNG_H__ #define __DT_BINDINGS_PINCTRL_SAMSUNG_H__ #define EXYNOS_PIN_PULL_NONE 0 #define EXYNOS_PIN_PULL_DOWN 1 #define EXYNOS_PIN_PULL_UP 3 #define S3C64XX_PIN_PULL_NONE 0 #define S3C64XX_PIN_PULL_DOWN 1 #define S3C64XX_PIN_PULL_UP 2 /* Pin function in power down mode */ #define EXYNOS_PIN_PDN_OUT0 0 #define EXYNOS_PIN_PDN_OUT1 1 #define EXYNOS_PIN_PDN_INPUT 2 #define EXYNOS_PIN_PDN_PREV 3 /* Drive strengths for Exynos3250, Exynos4 (all) and Exynos5250 */ #define EXYNOS4_PIN_DRV_LV1 0 #define EXYNOS4_PIN_DRV_LV2 2 #define EXYNOS4_PIN_DRV_LV3 1 #define EXYNOS4_PIN_DRV_LV4 3 /* Drive strengths for Exynos5260 */ #define EXYNOS5260_PIN_DRV_LV1 0 #define EXYNOS5260_PIN_DRV_LV2 1 #define EXYNOS5260_PIN_DRV_LV4 2 #define EXYNOS5260_PIN_DRV_LV6 3 /* Drive strengths for Exynos5410, Exynos542x and Exynos5800 */ #define EXYNOS5420_PIN_DRV_LV1 0 #define EXYNOS5420_PIN_DRV_LV2 1 #define EXYNOS5420_PIN_DRV_LV3 2 #define EXYNOS5420_PIN_DRV_LV4 3 /* Drive strengths for Exynos5433 */ #define EXYNOS5433_PIN_DRV_FAST_SR1 0 #define EXYNOS5433_PIN_DRV_FAST_SR2 1 #define EXYNOS5433_PIN_DRV_FAST_SR3 2 #define EXYNOS5433_PIN_DRV_FAST_SR4 3 #define EXYNOS5433_PIN_DRV_FAST_SR5 4 #define EXYNOS5433_PIN_DRV_FAST_SR6 5 #define EXYNOS5433_PIN_DRV_SLOW_SR1 8 #define EXYNOS5433_PIN_DRV_SLOW_SR2 9 #define EXYNOS5433_PIN_DRV_SLOW_SR3 0xa #define EXYNOS5433_PIN_DRV_SLOW_SR4 0xb #define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc #define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf #define EXYNOS_PIN_FUNC_INPUT 0 #define EXYNOS_PIN_FUNC_OUTPUT 1 #define EXYNOS_PIN_FUNC_2 2 #define EXYNOS_PIN_FUNC_3 3 #define EXYNOS_PIN_FUNC_4 4 #define EXYNOS_PIN_FUNC_5 5 #define EXYNOS_PIN_FUNC_6 6 #define EXYNOS_PIN_FUNC_EINT 0xf #define EXYNOS_PIN_FUNC_F EXYNOS_PIN_FUNC_EINT /* Drive strengths for Exynos7 FSYS1 block */ #define EXYNOS7_FSYS1_PIN_DRV_LV1 0 #define EXYNOS7_FSYS1_PIN_DRV_LV2 4 #define EXYNOS7_FSYS1_PIN_DRV_LV3 2 #define EXYNOS7_FSYS1_PIN_DRV_LV4 6 #define EXYNOS7_FSYS1_PIN_DRV_LV5 1 #define EXYNOS7_FSYS1_PIN_DRV_LV6 5 #endif /* __DT_BINDINGS_PINCTRL_SAMSUNG_H__ */
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