File Manager

003 File Manager

Current Path: /usr/src/sys/contrib/device-tree/Bindings/ata

usr / src / sys / contrib / device-tree / Bindings / ata /

📁 ..
📄 ahci-ceva.txt(2.59 KB)
📄 ahci-da850.txt(645 B)
📄 ahci-dm816.txt(790 B)
📄 ahci-fsl-qoriq.txt(768 B)
📄 ahci-mtk.txt(2.01 KB)
📄 ahci-platform.txt(2.42 KB)
📄 ahci-st.txt(1.2 KB)
📄 allwinner,sun4i-a10-ahci.yaml(928 B)
📄 allwinner,sun8i-r40-ahci.yaml(1.35 KB)
📄 apm-xgene.txt(2.23 KB)
📄 atmel-at91_cf.txt(534 B)
📄 brcm,sata-brcm.txt(1.1 KB)
📄 cavium-compact-flash.txt(911 B)
📄 cortina,gemini-sata-bridge.txt(2.01 KB)
📄 exynos-sata.txt(945 B)
📄 faraday,ftide010.yaml(1.97 KB)
📄 fsl-sata.txt(897 B)
📄 imx-pata.txt(389 B)
📄 imx-sata.txt(1.34 KB)
📄 marvell.txt(567 B)
📄 nvidia,tegra124-ahci.txt(1.46 KB)
📄 pata-arasan.txt(988 B)
📄 pata-common.yaml(1.39 KB)
📄 qcom-sata.txt(1.42 KB)
📄 renesas,rcar-sata.yaml(1.8 KB)
📄 sata-common.yaml(1.35 KB)
📄 sata_highbank.yaml(2.47 KB)

Editing: sata_highbank.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/sata_highbank.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Calxeda AHCI SATA Controller

description: |
  The Calxeda SATA controller mostly conforms to the AHCI interface
  with some special extensions to add functionality, to map GPIOs for
  activity LEDs and for mapping the ComboPHYs.

maintainers:
  - Andre Przywara <andre.przywara@arm.com>

properties:
  compatible:
    const: calxeda,hb-ahci

reg:
    maxItems: 1

interrupts:
    maxItems: 1

dma-coherent: true

calxeda,pre-clocks:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      Indicates the number of additional clock cycles to transmit before
      sending an SGPIO pattern.

calxeda,post-clocks:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      Indicates the number of additional clock cycles to transmit after
      sending an SGPIO pattern.

calxeda,led-order:
    description: Maps port numbers to offsets within the SGPIO bitstream.
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 1
    maxItems: 8

calxeda,port-phys:
    description: |
      phandle-combophy and lane assignment, which maps each SATA port to a
      combophy and a lane within that combophy
    $ref: /schemas/types.yaml#/definitions/phandle-array
    minItems: 1
    maxItems: 8

calxeda,tx-atten:
    description: |
      Contains TX attenuation override codes, one per port.
      The upper 24 bits of each entry are always 0 and thus ignored.
    $ref: /schemas/types.yaml#/definitions/uint32-array
    minItems: 1
    maxItems: 8

calxeda,sgpio-gpio:
    description: |
      phandle-gpio bank, bit offset, and default on or off, which indicates
      that the driver supports SGPIO indicator lights using the indicated
      GPIOs.

required:
  - compatible
  - reg
  - interrupts

additionalProperties: false

examples:
  - |
    sata@ffe08000 {
        compatible = "calxeda,hb-ahci";
        reg = <0xffe08000 0x1000>;
        interrupts = <115>;
        dma-coherent;
        calxeda,port-phys = <&combophy5 0>, <&combophy0 0>, <&combophy0 1>,
                             <&combophy0 2>, <&combophy0 3>;
        calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>, <&gpioh 7 1>;
        calxeda,led-order = <4 0 1 2 3>;
        calxeda,tx-atten = <0xff 22 0xff 0xff 23>;
        calxeda,pre-clocks = <10>;
        calxeda,post-clocks = <0>;
    };

...

003 File Manager

Editing: sata_highbank.yaml

Upload File

Create Folder