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apq8016-sbc.dts
(277 B)
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apq8016-sbc.dtsi
(18.56 KB)
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apq8096-db820c.dts
(291 B)
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apq8096-db820c.dtsi
(24.67 KB)
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apq8096-ifc6640.dts
(8.73 KB)
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ipq6018-cp01-c1.dts
(1.06 KB)
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ipq6018.dtsi
(9.94 KB)
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ipq8074-hk01.dts
(1.35 KB)
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ipq8074.dtsi
(16.82 KB)
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msm8916-longcheer-l8150.dts
(4.54 KB)
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msm8916-mtp.dts
(307 B)
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msm8916-mtp.dtsi
(450 B)
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msm8916-pins.dtsi
(8.97 KB)
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msm8916-samsung-a2015-common.dtsi
(6.71 KB)
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msm8916-samsung-a3u-eur.dts
(1.13 KB)
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msm8916-samsung-a5u-eur.dts
(843 B)
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msm8916.dtsi
(42.93 KB)
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msm8992-bullhead-rev-101.dts
(5.61 KB)
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msm8992-msft-lumia-talkman.dts
(796 B)
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msm8992-pins.dtsi
(1.56 KB)
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msm8992-xiaomi-libra.dts
(7.16 KB)
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msm8992.dtsi
(13.31 KB)
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msm8994-angler-rev-101.dts
(706 B)
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msm8994-pins.dtsi
(542 B)
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msm8994-smd-rpm.dtsi
(5.97 KB)
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msm8994-sony-xperia-kitakami-sumire.dts
(226 B)
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msm8994-sony-xperia-kitakami.dtsi
(4.68 KB)
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msm8994.dtsi
(15.28 KB)
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msm8996-mtp.dts
(254 B)
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msm8996-mtp.dtsi
(291 B)
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msm8996-pins.dtsi
(10.37 KB)
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msm8996.dtsi
(53.71 KB)
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msm8998-asus-novago-tp370ql.dts
(811 B)
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msm8998-clamshell.dtsi
(7.74 KB)
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msm8998-hp-envy-x2.dts
(532 B)
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msm8998-lenovo-miix-630.dts
(657 B)
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msm8998-mtp.dts
(267 B)
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msm8998-mtp.dtsi
(8.4 KB)
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msm8998-pins.dtsi
(1.85 KB)
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msm8998.dtsi
(44.87 KB)
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pm6150.dtsi
(1.71 KB)
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pm6150l.dtsi
(750 B)
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pm660.dtsi
(1012 B)
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pm660l.dtsi
(746 B)
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pm8004.dtsi
(564 B)
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pm8005.dtsi
(715 B)
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pm8009.dtsi
(741 B)
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pm8150.dtsi
(2.42 KB)
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pm8150b.dtsi
(2.14 KB)
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pm8150l.dtsi
(2.04 KB)
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pm8916.dtsi
(3.88 KB)
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pm8994.dtsi
(2.28 KB)
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pm8998.dtsi
(2.37 KB)
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pmi8994.dtsi
(787 B)
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pmi8998.dtsi
(885 B)
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pms405.dtsi
(3.13 KB)
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qcs404-evb-1000.dts
(256 B)
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qcs404-evb-4000.dts
(1.71 KB)
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qcs404-evb.dtsi
(6.75 KB)
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qcs404.dtsi
(38.84 KB)
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sc7180-idp.dts
(11.03 KB)
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sc7180.dtsi
(98.57 KB)
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sdm630-sony-xperia-ganges-kirin.dts
(220 B)
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sdm630-sony-xperia-ganges.dtsi
(753 B)
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sdm630-sony-xperia-nile-discovery.dts
(230 B)
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sdm630-sony-xperia-nile-pioneer.dts
(222 B)
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sdm630-sony-xperia-nile-voyager.dts
(337 B)
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sdm630-sony-xperia-nile.dtsi
(2.53 KB)
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sdm630.dtsi
(27.11 KB)
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sdm636-sony-xperia-ganges-mermaid.dts
(542 B)
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sdm660-xiaomi-lavender.dts
(754 B)
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sdm660.dtsi
(7.38 KB)
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sdm845-cheza-r1.dts
(4.64 KB)
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sdm845-cheza-r2.dts
(4.67 KB)
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sdm845-cheza-r3.dts
(3.1 KB)
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sdm845-cheza.dtsi
(25.95 KB)
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sdm845-db845c.dts
(22.18 KB)
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sdm845-mtp.dts
(13.04 KB)
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sdm845.dtsi
(118.59 KB)
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sdm850-lenovo-yoga-c630.dts
(10.69 KB)
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sm8150-mtp.dts
(9.72 KB)
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sm8150.dtsi
(42.98 KB)
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sm8250-mtp.dts
(10.09 KB)
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sm8250.dtsi
(47.11 KB)
Editing: sdm660.dtsi
// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2018, Craig Tatlor. * Copyright (c) 2020, Alexey Minnekhanov <alexey.min@gmail.com> */ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/qcom,gcc-sdm660.h> / { interrupt-parent = <&intc>; #address-cells = <2>; #size-cells = <2>; chosen { }; clocks { xo_board: xo_board { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <19200000>; clock-output-names = "xo_board"; }; sleep_clk: sleep_clk { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <32764>; clock-output-names = "sleep_clk"; }; }; cpus { #address-cells = <2>; #size-cells = <0>; CPU0: cpu@100 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x100>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; L2_1: l2-cache { compatible = "cache"; cache-level = <2>; }; L1_I_100: l1-icache { compatible = "cache"; }; L1_D_100: l1-dcache { compatible = "cache"; }; }; CPU1: cpu@101 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x101>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "cache"; }; L1_D_101: l1-dcache { compatible = "cache"; }; }; CPU2: cpu@102 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x102>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; L1_I_102: l1-icache { compatible = "cache"; }; L1_D_102: l1-dcache { compatible = "cache"; }; }; CPU3: cpu@103 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x103>; enable-method = "psci"; capacity-dmips-mhz = <1024>; next-level-cache = <&L2_1>; L1_I_103: l1-icache { compatible = "cache"; }; L1_D_103: l1-dcache { compatible = "cache"; }; }; CPU4: cpu@0 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x0>; enable-method = "psci"; capacity-dmips-mhz = <640>; next-level-cache = <&L2_0>; L2_0: l2-cache { compatible = "cache"; cache-level = <2>; }; L1_I_0: l1-icache { compatible = "cache"; }; L1_D_0: l1-dcache { compatible = "cache"; }; }; CPU5: cpu@1 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x1>; enable-method = "psci"; capacity-dmips-mhz = <640>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "cache"; }; L1_D_1: l1-dcache { compatible = "cache"; }; }; CPU6: cpu@2 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x2>; enable-method = "psci"; capacity-dmips-mhz = <640>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "cache"; }; L1_D_2: l1-dcache { compatible = "cache"; }; }; CPU7: cpu@3 { device_type = "cpu"; compatible = "qcom,kryo260"; reg = <0x0 0x3>; enable-method = "psci"; capacity-dmips-mhz = <640>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "cache"; }; L1_D_3: l1-dcache { compatible = "cache"; }; }; cpu-map { cluster0 { core0 { cpu = <&CPU4>; }; core1 { cpu = <&CPU5>; }; core2 { cpu = <&CPU6>; }; core3 { cpu = <&CPU7>; }; }; cluster1 { core0 { cpu = <&CPU0>; }; core1 { cpu = <&CPU1>; }; core2 { cpu = <&CPU2>; }; core3 { cpu = <&CPU3>; }; }; }; }; firmware { scm { compatible = "qcom,scm"; }; }; memory { device_type = "memory"; /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; timer { compatible = "arm,armv8-timer"; interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>; }; soc: soc { #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0 0xffffffff>; compatible = "simple-bus"; gcc: clock-controller@100000 { compatible = "qcom,gcc-sdm660"; #clock-cells = <1>; #reset-cells = <1>; #power-domain-cells = <1>; reg = <0x00100000 0x94000>; }; tlmm: pinctrl@3100000 { compatible = "qcom,sdm660-pinctrl"; reg = <0x03100000 0x400000>, <0x03500000 0x400000>, <0x03900000 0x400000>; reg-names = "south", "center", "north"; interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; gpio-controller; gpio-ranges = <&tlmm 0 0 114>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; uart_console_active: uart_console_active { pinmux { pins = "gpio4", "gpio5"; function = "blsp_uart2"; }; pinconf { pins = "gpio4", "gpio5"; drive-strength = <2>; bias-disable; }; }; }; spmi_bus: spmi@800f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x0800f000 0x1000>, <0x08400000 0x1000000>, <0x09400000 0x1000000>, <0x0a400000 0x220000>, <0x0800a000 0x3000>; reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupt-names = "periph_irq"; interrupts = <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>; qcom,ee = <0>; qcom,channel = <0>; #address-cells = <2>; #size-cells = <0>; interrupt-controller; #interrupt-cells = <4>; cell-index = <0>; }; blsp1_uart2: serial@c170000 { compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; reg = <0x0c170000 0x1000>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; clock-names = "core", "iface"; status = "disabled"; }; timer@17920000 { #address-cells = <1>; #size-cells = <1>; ranges; compatible = "arm,armv7-timer-mem"; reg = <0x17920000 0x1000>; frame@17921000 { frame-number = <0>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17921000 0x1000>, <0x17922000 0x1000>; }; frame@17923000 { frame-number = <1>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17923000 0x1000>; status = "disabled"; }; frame@17924000 { frame-number = <2>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17924000 0x1000>; status = "disabled"; }; frame@17925000 { frame-number = <3>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17925000 0x1000>; status = "disabled"; }; frame@17926000 { frame-number = <4>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17926000 0x1000>; status = "disabled"; }; frame@17927000 { frame-number = <5>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17927000 0x1000>; status = "disabled"; }; frame@17928000 { frame-number = <6>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; reg = <0x17928000 0x1000>; status = "disabled"; }; }; intc: interrupt-controller@17a00000 { compatible = "arm,gic-v3"; reg = <0x17a00000 0x10000>, <0x17b00000 0x100000>; #interrupt-cells = <3>; #address-cells = <1>; #size-cells = <1>; ranges; interrupt-controller; #redistributor-regions = <1>; redistributor-stride = <0x0 0x20000>; interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; }; }; };
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