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usr / src / sys / contrib / device-tree / src / arm64 / allwinner /

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📄 axp803.dtsi(2.73 KB)
📄 sun50i-a64-amarula-relic.dts(6.25 KB)
📄 sun50i-a64-bananapi-m64.dts(6.75 KB)
📄 sun50i-a64-cpu-opp.dtsi(1.51 KB)
📄 sun50i-a64-nanopi-a64.dts(4.4 KB)
📄 sun50i-a64-oceanic-5205-5inmfd.dts(1.55 KB)
📄 sun50i-a64-olinuxino-emmc.dts(555 B)
📄 sun50i-a64-olinuxino.dts(6.26 KB)
📄 sun50i-a64-orangepi-win.dts(7.58 KB)
📄 sun50i-a64-pine64-lts.dts(242 B)
📄 sun50i-a64-pine64-plus.dts(694 B)
📄 sun50i-a64-pine64.dts(5.27 KB)
📄 sun50i-a64-pinebook.dts(7.71 KB)
📄 sun50i-a64-pinephone-1.0.dts(272 B)
📄 sun50i-a64-pinephone-1.1.dts(854 B)
📄 sun50i-a64-pinephone-1.2.dts(1.03 KB)
📄 sun50i-a64-pinephone.dtsi(8.13 KB)
📄 sun50i-a64-pinetab.dts(8.7 KB)
📄 sun50i-a64-sopine-baseboard.dts(3.36 KB)
📄 sun50i-a64-sopine.dtsi(2.56 KB)
📄 sun50i-a64-teres-i.dts(7.13 KB)
📄 sun50i-a64.dtsi(31.99 KB)
📄 sun50i-h5-bananapi-m2-plus-v1.2.dts(332 B)
📄 sun50i-h5-bananapi-m2-plus.dts(283 B)
📄 sun50i-h5-cpu-opp.dtsi(1.78 KB)
📄 sun50i-h5-emlid-neutis-n5-devboard.dts(1.22 KB)
📄 sun50i-h5-emlid-neutis-n5.dtsi(254 B)
📄 sun50i-h5-libretech-all-h3-cc.dts(395 B)
📄 sun50i-h5-libretech-all-h3-it.dts(297 B)
📄 sun50i-h5-libretech-all-h5-cc.dts(1.22 KB)
📄 sun50i-h5-nanopi-neo-plus2.dts(2.95 KB)
📄 sun50i-h5-nanopi-neo2.dts(2.14 KB)
📄 sun50i-h5-orangepi-pc2.dts(3.68 KB)
📄 sun50i-h5-orangepi-prime.dts(3.43 KB)
📄 sun50i-h5-orangepi-zero-plus.dts(2.49 KB)
📄 sun50i-h5-orangepi-zero-plus2.dts(2.44 KB)
📄 sun50i-h5.dtsi(6.11 KB)
📄 sun50i-h6-beelink-gs1.dts(5.74 KB)
📄 sun50i-h6-cpu-opp.dtsi(3.14 KB)
📄 sun50i-h6-orangepi-3.dts(6.67 KB)
📄 sun50i-h6-orangepi-lite2.dts(1.64 KB)
📄 sun50i-h6-orangepi-one-plus.dts(967 B)
📄 sun50i-h6-orangepi.dtsi(5.07 KB)
📄 sun50i-h6-pine-h64-model-b.dts(373 B)
📄 sun50i-h6-pine-h64.dts(6.34 KB)
📄 sun50i-h6-tanix-tx6.dts(1.76 KB)
📄 sun50i-h6.dtsi(25.06 KB)

Editing: sun50i-a64-sopine.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2017 Icenowy Zheng <icenowy@aosc.xyz>
// Based on sun50i-a64-pine64.dts, which is:
//   Copyright (c) 2016 ARM Ltd.

#include "sun50i-a64.dtsi"
#include "sun50i-a64-cpu-opp.dtsi"

#include <dt-bindings/gpio/gpio.h>

&codec_analog {
	cpvdd-supply = <&reg_eldo1>;
};

&cpu0 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu1 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu2 {
	cpu-supply = <&reg_dcdc2>;
};

&cpu3 {
	cpu-supply = <&reg_dcdc2>;
};

&mmc0 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc0_pins>;
	vmmc-supply = <&reg_dcdc1>;
	non-removable;
	disable-wp;
	bus-width = <4>;
	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
	status = "okay";
};

&r_rsb {
	status = "okay";

axp803: pmic@3a3 {
		compatible = "x-powers,axp803";
		reg = <0x3a3>;
		interrupt-parent = <&r_intc>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	};
};

&spi0  {
	status = "okay";

flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;
	};
};

#include "axp803.dtsi"

&reg_aldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-pl";
};

&reg_aldo3 {
	regulator-always-on;
	regulator-min-microvolt = <3000000>;
	regulator-max-microvolt = <3000000>;
	regulator-name = "vcc-pll-avcc";
};

&reg_dcdc1 {
	regulator-always-on;
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-name = "vcc-3v3";
};

&reg_dcdc2 {
	regulator-always-on;
	regulator-min-microvolt = <1040000>;
	regulator-max-microvolt = <1300000>;
	regulator-name = "vdd-cpux";
};

/* DCDC3 is polyphased with DCDC2 */

&reg_dcdc5 {
	regulator-always-on;
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-dram";
};

&reg_dcdc6 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-sys";
};

&reg_eldo1 {
	regulator-always-on;
	regulator-min-microvolt = <1800000>;
	regulator-max-microvolt = <1800000>;
	regulator-name = "vdd-1v8-lpddr";
};

&reg_fldo1 {
	regulator-min-microvolt = <1200000>;
	regulator-max-microvolt = <1200000>;
	regulator-name = "vcc-1v2-hsic";
};

/*
 * The A64 chip cannot work without this regulator off, although
 * it seems to be only driving the AR100 core.
 * Maybe we don't still know well about CPUs domain.
 */
&reg_fldo2 {
	regulator-always-on;
	regulator-min-microvolt = <1100000>;
	regulator-max-microvolt = <1100000>;
	regulator-name = "vdd-cpus";
};

&reg_rtc_ldo {
	regulator-name = "vcc-rtc";
};

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Editing: sun50i-a64-sopine.dtsi

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