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autoconf.c
(3.3 KB)
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bcopy_page.S
(4.14 KB)
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bcopyinout.S
(3.35 KB)
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bcopyinout_xscale.S
(19.19 KB)
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blockio.S
(13.19 KB)
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bus_space_asm_generic.S
(5.43 KB)
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bus_space_base.c
(4.8 KB)
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bus_space_generic.c
(4.1 KB)
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busdma_machdep.c
(50.91 KB)
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copystr.S
(3.29 KB)
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cpu_asm-v6.S
(7.88 KB)
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cpufunc.c
(8.69 KB)
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cpufunc_asm.S
(2.53 KB)
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cpufunc_asm_arm11x6.S
(3.5 KB)
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cpufunc_asm_armv7.S
(1.82 KB)
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cpufunc_asm_pj4b.S
(3.47 KB)
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cpuinfo.c
(14.82 KB)
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db_disasm.c
(2.58 KB)
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db_interface.c
(7.03 KB)
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db_trace.c
(4.69 KB)
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debug_monitor.c
(24 KB)
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disassem.c
(20.16 KB)
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dump_machdep.c
(2.95 KB)
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elf_machdep.c
(8.8 KB)
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elf_note.S
(1.56 KB)
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exception.S
(14.21 KB)
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fiq.c
(4.69 KB)
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fiq_subr.S
(2.77 KB)
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fusu.S
(5.61 KB)
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gdb_machdep.c
(3.62 KB)
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genassym.c
(5.29 KB)
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generic_timer.c
(13.62 KB)
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gic.c
(32.64 KB)
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gic.h
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gic_acpi.c
(9.14 KB)
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gic_common.h
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gic_fdt.c
(9.69 KB)
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hypervisor-stub.S
(2.61 KB)
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identcpu-v6.c
(10.16 KB)
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in_cksum.c
(4.23 KB)
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in_cksum_arm.S
(6.87 KB)
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locore-v6.S
(14.28 KB)
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locore.S
(1.63 KB)
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machdep.c
(23.79 KB)
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machdep_boot.c
(12.48 KB)
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machdep_intr.c
(7.63 KB)
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machdep_kdb.c
(3.77 KB)
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machdep_ptrace.c
(8.1 KB)
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mem.c
(5.03 KB)
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minidump_machdep.c
(8.77 KB)
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mp_machdep.c
(8.58 KB)
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mpcore_timer.c
(15.71 KB)
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mpcore_timervar.h
(2.03 KB)
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nexus.c
(11.33 KB)
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nexusvar.h
(1.54 KB)
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ofw_machdep.c
(2.28 KB)
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pl190.c
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pl310.c
(16.9 KB)
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platform.c
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platform_if.m
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platform_pl310_if.m
(2.44 KB)
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pmap-v6.c
(187.97 KB)
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pmu.c
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pmu.h
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pmu_fdt.c
(5.87 KB)
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ptrace_machdep.c
(1.89 KB)
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sc_machdep.c
(2.21 KB)
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setcpsr.S
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setstack.s
(3.16 KB)
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stack_machdep.c
(2.65 KB)
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stdatomic.c
(13.88 KB)
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support.S
(51.78 KB)
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swtch-v6.S
(13.07 KB)
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swtch.S
(4.68 KB)
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sys_machdep.c
(5.24 KB)
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syscall.c
(5.54 KB)
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trap-v6.c
(19.14 KB)
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uio_machdep.c
(3.95 KB)
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undefined.c
(9.07 KB)
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unwind.c
(16.62 KB)
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vfp.c
(9.1 KB)
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vm_machdep.c
(8.38 KB)
Editing: sys_machdep.c
/*- * SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 1990 The Regents of the University of California. * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * from: @(#)sys_machdep.c 5.5 (Berkeley) 1/19/91 */ #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); #include "opt_capsicum.h" #include <sys/param.h> #include <sys/systm.h> #include <sys/capsicum.h> #include <sys/proc.h> #include <sys/sysproto.h> #include <sys/syscall.h> #include <sys/sysent.h> #include <vm/vm.h> #include <vm/vm_extern.h> #include <machine/cpu.h> #include <machine/sysarch.h> #include <machine/machdep.h> #include <machine/vmparam.h> #ifndef _SYS_SYSPROTO_H_ struct sysarch_args { int op; char *parms; }; #endif /* Prototypes */ static int arm32_sync_icache (struct thread *, void *); static int arm32_drain_writebuf(struct thread *, void *); static int sync_icache(uintptr_t addr, size_t len) { size_t size; vm_offset_t rv; /* Align starting address to cacheline size */ len += addr & cpuinfo.dcache_line_mask; addr &= ~cpuinfo.dcache_line_mask; /* Break whole range to pages. */ do { size = PAGE_SIZE - (addr & PAGE_MASK); size = min(size, len); rv = dcache_wb_pou_checked(addr, size); if (rv == 1) /* see dcache_wb_pou_checked() */ rv = icache_inv_pou_checked(addr, size); if (rv != 1) { if (!useracc((void *)addr, size, VM_PROT_READ)) { /* Invalid access */ return (rv); } /* Valid but unmapped page - skip it. */ } len -= size; addr += size; } while (len > 0); /* Invalidate branch predictor buffer. */ bpb_inv_all(); return (1); } static int arm32_sync_icache(struct thread *td, void *args) { struct arm_sync_icache_args ua; int error; ksiginfo_t ksi; vm_offset_t rv; if ((error = copyin(args, &ua, sizeof(ua))) != 0) return (error); if (ua.len == 0) { td->td_retval[0] = 0; return (0); } /* * Validate arguments. Address and length are unsigned, * so we can use wrapped overflow check. */ if (((ua.addr + ua.len) < ua.addr) || ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) { ksiginfo_init_trap(&ksi); ksi.ksi_signo = SIGSEGV; ksi.ksi_code = SEGV_ACCERR; ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS); trapsignal(td, &ksi); return (EINVAL); } rv = sync_icache(ua.addr, ua.len); if (rv != 1) { ksiginfo_init_trap(&ksi); ksi.ksi_signo = SIGSEGV; ksi.ksi_code = SEGV_MAPERR; ksi.ksi_addr = (void *)rv; trapsignal(td, &ksi); return (EINVAL); } td->td_retval[0] = 0; return (0); } static int arm32_drain_writebuf(struct thread *td, void *args) { /* No args. */ dsb(); cpu_l2cache_drain_writebuf(); td->td_retval[0] = 0; return (0); } static int arm32_set_tp(struct thread *td, void *args) { set_tls(args); return (0); } static int arm32_get_tp(struct thread *td, void *args) { td->td_retval[0] = (register_t)get_tls(); return (0); } int sysarch(struct thread *td, struct sysarch_args *uap) { int error; #ifdef CAPABILITY_MODE /* * When adding new operations, add a new case statement here to * explicitly indicate whether or not the operation is safe to * perform in capability mode. */ if (IN_CAPABILITY_MODE(td)) { switch (uap->op) { case ARM_SYNC_ICACHE: case ARM_DRAIN_WRITEBUF: case ARM_SET_TP: case ARM_GET_TP: case ARM_GET_VFPSTATE: break; default: #ifdef KTRACE if (KTRPOINT(td, KTR_CAPFAIL)) ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL); #endif return (ECAPMODE); } } #endif switch (uap->op) { case ARM_SYNC_ICACHE: error = arm32_sync_icache(td, uap->parms); break; case ARM_DRAIN_WRITEBUF: error = arm32_drain_writebuf(td, uap->parms); break; case ARM_SET_TP: error = arm32_set_tp(td, uap->parms); break; case ARM_GET_TP: error = arm32_get_tp(td, uap->parms); break; case ARM_GET_VFPSTATE: error = arm_get_vfpstate(td, uap->parms); break; default: error = EINVAL; break; } return (error); }
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