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Makefile
(77 B)
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Makefile.inc
(40 B)
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annapurna-alpine.dts
(7.38 KB)
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db78100.dts
(7.73 KB)
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db78460.dts
(7.06 KB)
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db88f5182.dts
(5.39 KB)
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db88f5281.dts
(5.43 KB)
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db88f6281.dts
(6.97 KB)
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digi-ccwmx53.dts
(3.45 KB)
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dockstar.dts
(5.71 KB)
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dreamplug-1001.dts
(7.86 KB)
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dreamplug-1001N.dts
(8.3 KB)
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ea3250.dts
(5.97 KB)
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efikamx.dts
(2.89 KB)
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imx51x.dtsi
(15.98 KB)
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imx53x.dtsi
(17.42 KB)
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overlays
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rt1310a.dtsi
(3.68 KB)
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sheevaplug.dts
(5.84 KB)
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socfpga_arria10_socdk_sdmmc.dts
(2.99 KB)
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socfpga_cyclone5_sockit_beri_sdmmc.dts
(4.09 KB)
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socfpga_cyclone5_sockit_sdmmc.dts
(2.26 KB)
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tegra124-jetson-tk1-fbsd.dts
(1.83 KB)
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tegra20-paz00.dts
(1.78 KB)
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tegra20.dtsi
(2.43 KB)
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trimslice.dts
(3.72 KB)
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ts7800.dts
(3.89 KB)
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ufw.dts
(9.96 KB)
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versatilepb.dts
(2.16 KB)
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vsatv102-m6.dts
(7.62 KB)
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vybrid-colibri-vf50.dts
(2.1 KB)
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vybrid-cosmic.dts
(2.15 KB)
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vybrid-quartz.dts
(2.87 KB)
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vybrid.dtsi
(11.31 KB)
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wzr2-g300n.dts
(2.35 KB)
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yyhd18-m3.dts
(5.98 KB)
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zedboard.dts
(2.05 KB)
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zybo.dts
(2.03 KB)
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zynq-7000.dtsi
(6 KB)
Editing: versatilepb.dts
/* * $FreeBSD$ */ /dts-v1/; / { model = "ARM Versatile PB"; #address-cells = <1>; #size-cells = <1>; compatible = "arm,versatile-pb"; amba { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; ranges; intc: interrupt-controller { compatible = "arm,versatile-vic"; reg = <0x10140000 0x1000>; interrupt-controller; #interrupt-cells = <1>; }; sic: secondary-interrupt-controller { compatible = "arm,versatile-sic"; reg = <0x10003000 0x28>; interrupt-controller; #interrupt-cells = <1>; }; uart0: uart0 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f1000 0x1000>; interrupts = <12>; interrupt-parent = <&intc>; clock-frequency = <3000000>; reg-shift = <2>; }; uart1: uart1 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f2000 0x1000>; interrupts = <13>; interrupt-parent = <&intc>; clock-frequency = <3000000>; reg-shift = <2>; }; uart2: uart2 { compatible = "arm,pl011", "arm,primecell"; reg = <0x101f3000 0x1000>; interrupts = <14>; interrupt-parent = <&intc>; clock-frequency = <3000000>; reg-shift = <2>; }; timer0 { compatible = "arm,sp804", "arm,primecell"; reg = <0x101e2000 0x40>; interrupts = <4>; interrupt-parent = <&intc>; }; pci0 { compatible = "versatile,pci"; reg = <0x10000044 0x4 0x10001000 0x1000 0x41000000 0x01000000 0x42000000 0x02000000>; }; net { compatible = "smsc,lan91c111"; reg = <0x10010000 0x10000>; interrupts = <25>; interrupt-parent = <&intc>; }; display { compatible = "arm,pl110", "arm,primecell"; reg = <0x10000050 4 0x10120000 0x1000>; interrupts = <16>; interrupt-parent = <&intc>; }; /* * Cut corner here: we do not have proper interrupt * controllers cascading so just hardwire SIC IRQ 3 * to VIC IRQ31 */ kmi { compatible = "arm,pl050", "arm,primecell"; reg = <0x10006000 0x1000>; interrupt-parent = <&intc>; interrupts = <31>; }; }; memory { device_type = "memory"; reg = <0 0x08000000>; /* 128MB */ }; aliases { uart0 = &uart0; }; chosen { stdin = "uart0"; stdout = "uart0"; }; };
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