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📁 ..
📄 Makefile(2.18 KB)
📄 Makefile.depend(434 B)
📄 Makefile.depend.options(115 B)
📄 acpi.c(29.64 KB)
📄 acpi.h(2.26 KB)
📄 ahci.h(10.72 KB)
📄 atkbdc.c(15.5 KB)
📄 atkbdc.h(1.66 KB)
📄 audio.c(6.84 KB)
📄 audio.h(2.91 KB)
📄 bhyve.8(18.81 KB)
📄 bhyvegc.c(2.76 KB)
📄 bhyvegc.h(1.83 KB)
📄 bhyverun.c(33 KB)
📄 bhyverun.h(2.06 KB)
📄 block_if.c(21.38 KB)
📄 block_if.h(3.37 KB)
📄 bootrom.c(4.92 KB)
📄 bootrom.h(1.8 KB)
📄 console.c(3 KB)
📄 console.h(2.18 KB)
📄 debug.h(1.74 KB)
📄 fwctl.c(9.7 KB)
📄 fwctl.h(1.87 KB)
📄 gdb.c(37.2 KB)
📄 gdb.h(1.65 KB)
📄 hda_codec.c(24.56 KB)
📄 hda_reg.h(57.84 KB)
📄 hdac_reg.h(10.96 KB)
📄 inout.c(6.97 KB)
📄 inout.h(2.54 KB)
📄 ioapic.c(2.45 KB)
📄 ioapic.h(1.65 KB)
📄 iov.c(3.47 KB)
📄 iov.h(1.93 KB)
📄 kernemu_dev.c(2.95 KB)
📄 kernemu_dev.h(1.44 KB)
📄 mem.c(8.78 KB)
📄 mem.h(2.31 KB)
📄 mevent.c(9.86 KB)
📄 mevent.h(1.95 KB)
📄 mevent_test.c(5.36 KB)
📄 mptbl.c(9.44 KB)
📄 mptbl.h(1.53 KB)
📄 net_backends.c(24.6 KB)
📄 net_backends.h(4.19 KB)
📄 net_utils.c(3.04 KB)
📄 net_utils.h(1.67 KB)
📄 pci_ahci.c(64.56 KB)
📄 pci_e82545.c(65.54 KB)
📄 pci_emul.c(54.54 KB)
📄 pci_emul.h(8.47 KB)
📄 pci_fbuf.c(10.34 KB)
📄 pci_hda.c(30.87 KB)
📄 pci_hda.h(2.73 KB)
📄 pci_hostbridge.c(2.43 KB)
📄 pci_irq.c(9.19 KB)
📄 pci_irq.h(1.85 KB)
📄 pci_lpc.c(11.06 KB)
📄 pci_lpc.h(2.41 KB)
📄 pci_nvme.c(73.14 KB)
📄 pci_passthru.c(22.85 KB)
📄 pci_uart.c(3.2 KB)
📄 pci_virtio_9p.c(9.1 KB)
📄 pci_virtio_block.c(15.89 KB)
📄 pci_virtio_console.c(15.86 KB)
📄 pci_virtio_net.c(20.05 KB)
📄 pci_virtio_rnd.c(5.23 KB)
📄 pci_virtio_scsi.c(19.95 KB)
📄 pci_xhci.c(80.6 KB)
📄 pci_xhci.h(13.02 KB)
📄 pctestdev.c(6.3 KB)
📄 pctestdev.h(1.65 KB)
📄 pm.c(8.9 KB)
📄 post.c(1.8 KB)
📄 ps2kbd.c(10.24 KB)
📄 ps2kbd.h(1.8 KB)
📄 ps2mouse.c(9.85 KB)
📄 ps2mouse.h(1.94 KB)
📄 rfb.c(25.9 KB)
📄 rfb.h(1.56 KB)
📄 rtc.c(3.4 KB)
📄 rtc.h(1.52 KB)
📄 smbiostbl.c(25.33 KB)
📄 smbiostbl.h(1.54 KB)
📄 snapshot.c(38.16 KB)
📄 snapshot.h(3.51 KB)
📄 sockstream.c(2.16 KB)
📄 sockstream.h(1.54 KB)
📄 spinup_ap.c(3 KB)
📄 spinup_ap.h(1.5 KB)
📄 task_switch.c(25.78 KB)
📄 uart_emul.c(15.75 KB)
📄 uart_emul.h(1.99 KB)
📄 usb_emul.c(2.3 KB)
📄 usb_emul.h(4.56 KB)
📄 usb_mouse.c(19.9 KB)
📄 vga.c(33.42 KB)
📄 vga.h(5.32 KB)
📄 virtio.c(25.01 KB)
📄 virtio.h(18.67 KB)
📄 vmgenc.c(3.27 KB)
📄 vmgenc.h(1.48 KB)
📄 xmsr.c(5.28 KB)
📄 xmsr.h(1.59 KB)

Editing: xmsr.c

/*-
 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
 *
 * Copyright (c) 2011 NetApp, Inc.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * $FreeBSD$
 */

#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");

#include <sys/types.h>

#include <machine/cpufunc.h>
#include <machine/vmm.h>
#include <machine/specialreg.h>

#include <vmmapi.h>

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "debug.h"
#include "xmsr.h"

static int cpu_vendor_intel, cpu_vendor_amd, cpu_vendor_hygon;

int
emulate_wrmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t val)
{

if (cpu_vendor_intel) {
		switch (num) {
		case 0xd04:		/* Sandy Bridge uncore PMCs */
		case 0xc24:
			return (0);
		case MSR_BIOS_UPDT_TRIG:
			return (0);
		case MSR_BIOS_SIGN:
			return (0);
		default:
			break;
		}
	} else if (cpu_vendor_amd || cpu_vendor_hygon) {
		switch (num) {
		case MSR_HWCR:
			/*
			 * Ignore writes to hardware configuration MSR.
			 */
			return (0);

case MSR_NB_CFG1:
		case MSR_LS_CFG:
		case MSR_IC_CFG:
			return (0);	/* Ignore writes */

case MSR_PERFEVSEL0:
		case MSR_PERFEVSEL1:
		case MSR_PERFEVSEL2:
		case MSR_PERFEVSEL3:
			/* Ignore writes to the PerfEvtSel MSRs */
			return (0);

case MSR_K7_PERFCTR0:
		case MSR_K7_PERFCTR1:
		case MSR_K7_PERFCTR2:
		case MSR_K7_PERFCTR3:
			/* Ignore writes to the PerfCtr MSRs */
			return (0);

case MSR_P_STATE_CONTROL:
			/* Ignore write to change the P-state */
			return (0);

default:
			break;
		}
	}
	return (-1);
}

int
emulate_rdmsr(struct vmctx *ctx, int vcpu, uint32_t num, uint64_t *val)
{
	int error = 0;

if (cpu_vendor_intel) {
		switch (num) {
		case MSR_BIOS_SIGN:
		case MSR_IA32_PLATFORM_ID:
		case MSR_PKG_ENERGY_STATUS:
		case MSR_PP0_ENERGY_STATUS:
		case MSR_PP1_ENERGY_STATUS:
		case MSR_DRAM_ENERGY_STATUS:
			*val = 0;
			break;
		case MSR_RAPL_POWER_UNIT:
			/*
			 * Use the default value documented in section
			 * "RAPL Interfaces" in Intel SDM vol3.
			 */
			*val = 0x000a1003;
			break;
		default:
			error = -1;
			break;
		}
	} else if (cpu_vendor_amd || cpu_vendor_hygon) {
		switch (num) {
		case MSR_BIOS_SIGN:
			*val = 0;
			break;
		case MSR_HWCR:
			/*
			 * Bios and Kernel Developer's Guides for AMD Families
			 * 12H, 14H, 15H and 16H.
			 */
			*val = 0x01000010;	/* Reset value */
			*val |= 1 << 9;		/* MONITOR/MWAIT disable */
			break;

case MSR_NB_CFG1:
		case MSR_LS_CFG:
		case MSR_IC_CFG:
			/*
			 * The reset value is processor family dependent so
			 * just return 0.
			 */
			*val = 0;
			break;

case MSR_PERFEVSEL0:
		case MSR_PERFEVSEL1:
		case MSR_PERFEVSEL2:
		case MSR_PERFEVSEL3:
			/*
			 * PerfEvtSel MSRs are not properly virtualized so just
			 * return zero.
			 */
			*val = 0;
			break;

case MSR_K7_PERFCTR0:
		case MSR_K7_PERFCTR1:
		case MSR_K7_PERFCTR2:
		case MSR_K7_PERFCTR3:
			/*
			 * PerfCtr MSRs are not properly virtualized so just
			 * return zero.
			 */
			*val = 0;
			break;

case MSR_SMM_ADDR:
		case MSR_SMM_MASK:
			/*
			 * Return the reset value defined in the AMD Bios and
			 * Kernel Developer's Guide.
			 */
			*val = 0;
			break;

case MSR_P_STATE_LIMIT:
		case MSR_P_STATE_CONTROL:
		case MSR_P_STATE_STATUS:
		case MSR_P_STATE_CONFIG(0):	/* P0 configuration */
			*val = 0;
			break;

/*
		 * OpenBSD guests test bit 0 of this MSR to detect if the
		 * workaround for erratum 721 is already applied.
		 * https://support.amd.com/TechDocs/41322_10h_Rev_Gd.pdf
		 */
		case 0xC0011029:
			*val = 1;
			break;

default:
			error = -1;
			break;
		}
	} else {
		error = -1;
	}
	return (error);
}

int
init_msr(void)
{
	int error;
	u_int regs[4];
	char cpu_vendor[13];

do_cpuid(0, regs);
	((u_int *)&cpu_vendor)[0] = regs[1];
	((u_int *)&cpu_vendor)[1] = regs[3];
	((u_int *)&cpu_vendor)[2] = regs[2];
	cpu_vendor[12] = '\0';

error = 0;
	if (strcmp(cpu_vendor, "AuthenticAMD") == 0) {
		cpu_vendor_amd = 1;
	} else if (strcmp(cpu_vendor, "HygonGenuine") == 0) {
		cpu_vendor_hygon = 1;
	} else if (strcmp(cpu_vendor, "GenuineIntel") == 0) {
		cpu_vendor_intel = 1;
	} else {
		EPRINTLN("Unknown cpu vendor \"%s\"", cpu_vendor);
		error = -1;
	}
	return (error);
}

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Editing: xmsr.c

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