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weak_symbols.txt
(88 B)
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xray_AArch64.cpp
(4.62 KB)
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xray_allocator.h
(9.33 KB)
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xray_always_instrument.txt
(255 B)
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xray_arm.cpp
(5.87 KB)
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xray_basic_flags.cpp
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xray_basic_flags.h
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xray_basic_flags.inc
(1011 B)
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xray_basic_logging.cpp
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xray_basic_logging.h
(1.68 KB)
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xray_buffer_queue.cpp
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xray_buffer_queue.h
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xray_defs.h
(967 B)
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xray_fdr_controller.h
(11.79 KB)
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xray_fdr_flags.cpp
(1.47 KB)
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xray_fdr_flags.h
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xray_fdr_flags.inc
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xray_fdr_log_records.h
(2.5 KB)
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xray_fdr_log_writer.h
(8.72 KB)
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xray_fdr_logging.cpp
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xray_fdr_logging.h
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xray_flags.cpp
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xray_flags.h
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xray_flags.inc
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xray_function_call_trie.h
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xray_init.cpp
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xray_interface.cpp
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xray_interface_internal.h
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xray_log_interface.cpp
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xray_mips.cpp
(7.16 KB)
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xray_mips64.cpp
(7.66 KB)
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xray_never_instrument.txt
(282 B)
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xray_powerpc64.cpp
(3.63 KB)
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xray_powerpc64.inc
(1019 B)
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xray_profile_collector.cpp
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xray_profile_collector.h
(2.73 KB)
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xray_profiling.cpp
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xray_profiling_flags.cpp
(1.34 KB)
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xray_profiling_flags.h
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xray_profiling_flags.inc
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xray_recursion_guard.h
(1.8 KB)
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xray_segmented_array.h
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xray_trampoline_AArch64.S
(6.1 KB)
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xray_trampoline_arm.S
(3.85 KB)
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xray_trampoline_mips.S
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xray_trampoline_mips64.S
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xray_trampoline_powerpc64.cpp
(420 B)
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xray_trampoline_powerpc64_asm.S
(3.91 KB)
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xray_trampoline_x86_64.S
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xray_tsc.h
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xray_utils.cpp
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xray_utils.h
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xray_x86_64.cpp
(11.73 KB)
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xray_x86_64.inc
(997 B)
Editing: xray_AArch64.cpp
//===-- xray_AArch64.cpp ----------------------------------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// // // This file is a part of XRay, a dynamic runtime instrumentation system. // // Implementation of AArch64-specific routines (64-bit). // //===----------------------------------------------------------------------===// #include "sanitizer_common/sanitizer_common.h" #include "xray_defs.h" #include "xray_interface_internal.h" #include <atomic> #include <cassert> extern "C" void __clear_cache(void *start, void *end); namespace __xray { // The machine codes for some instructions used in runtime patching. enum class PatchOpcodes : uint32_t { PO_StpX0X30SP_m16e = 0xA9BF7BE0, // STP X0, X30, [SP, #-16]! PO_LdrW0_12 = 0x18000060, // LDR W0, #12 PO_LdrX16_12 = 0x58000070, // LDR X16, #12 PO_BlrX16 = 0xD63F0200, // BLR X16 PO_LdpX0X30SP_16 = 0xA8C17BE0, // LDP X0, X30, [SP], #16 PO_B32 = 0x14000008 // B #32 }; inline static bool patchSled(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled, void (*TracingHook)()) XRAY_NEVER_INSTRUMENT { // When |Enable| == true, // We replace the following compile-time stub (sled): // // xray_sled_n: // B #32 // 7 NOPs (24 bytes) // // With the following runtime patch: // // xray_sled_n: // STP X0, X30, [SP, #-16]! ; PUSH {r0, lr} // LDR W0, #12 ; W0 := function ID // LDR X16,#12 ; X16 := address of the trampoline // BLR X16 // ;DATA: 32 bits of function ID // ;DATA: lower 32 bits of the address of the trampoline // ;DATA: higher 32 bits of the address of the trampoline // LDP X0, X30, [SP], #16 ; POP {r0, lr} // // Replacement of the first 4-byte instruction should be the last and atomic // operation, so that the user code which reaches the sled concurrently // either jumps over the whole sled, or executes the whole sled when the // latter is ready. // // When |Enable|==false, we set back the first instruction in the sled to be // B #32 uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.address()); uint32_t *CurAddress = FirstAddress + 1; if (Enable) { *CurAddress = uint32_t(PatchOpcodes::PO_LdrW0_12); CurAddress++; *CurAddress = uint32_t(PatchOpcodes::PO_LdrX16_12); CurAddress++; *CurAddress = uint32_t(PatchOpcodes::PO_BlrX16); CurAddress++; *CurAddress = FuncId; CurAddress++; *reinterpret_cast<void (**)()>(CurAddress) = TracingHook; CurAddress += 2; *CurAddress = uint32_t(PatchOpcodes::PO_LdpX0X30SP_16); CurAddress++; std::atomic_store_explicit( reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress), uint32_t(PatchOpcodes::PO_StpX0X30SP_m16e), std::memory_order_release); } else { std::atomic_store_explicit( reinterpret_cast<std::atomic<uint32_t> *>(FirstAddress), uint32_t(PatchOpcodes::PO_B32), std::memory_order_release); } __clear_cache(reinterpret_cast<char *>(FirstAddress), reinterpret_cast<char *>(CurAddress)); return true; } bool patchFunctionEntry(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled, void (*Trampoline)()) XRAY_NEVER_INSTRUMENT { return patchSled(Enable, FuncId, Sled, Trampoline); } bool patchFunctionExit(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT { return patchSled(Enable, FuncId, Sled, __xray_FunctionExit); } bool patchFunctionTailExit(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT { return patchSled(Enable, FuncId, Sled, __xray_FunctionTailExit); } bool patchCustomEvent(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT { // FIXME: Implement in aarch64? return false; } bool patchTypedEvent(const bool Enable, const uint32_t FuncId, const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT { // FIXME: Implement in aarch64? return false; } // FIXME: Maybe implement this better? bool probeRequiredCPUFeatures() XRAY_NEVER_INSTRUMENT { return true; } } // namespace __xray extern "C" void __xray_ArgLoggerEntry() XRAY_NEVER_INSTRUMENT { // FIXME: this will have to be implemented in the trampoline assembly file }
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